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Hi everyone,
I'm having an issue with my SCI communication implementation. I'm using the TX FIFO empty interrupt to help determine when the end of a message is transmitted, but I can't perform a transceiver direction pin toggle there as apparently doing so causes the message to be incomplete / lops off the last byte of transmitted data. To deal with this, I utilize a 1ms Clock SWI to perform the pin toggle after the TX FIFO empty interrupt occurs. This is not optimal as we have some customers that do not have robust applications and the current implementation is causing some small noise in their systems.
I'm looking for a suggestion or a different pattern to use and help eliminate the excess microseconds of signal which are causing noise to our customers.
Regards,
-Wes
Hi Wes,
Is it possible to use TXRDY as your interrupt source instead? This should occur later than the TX FIFO empty interrupt since the contents of the FIFO are shifted to TXBUF before the data is shifted out to the TX pin.
Thank you,
Luke
Perhaps after the TX FIFO empty interrupt, then I can try enabling the TXRDY interrupt and using it to perform the direction pin toggle when it occurs. I'll give it a try. Thanks!
Does using the TX FIFO remove the TXRDY from being sent? Unfortunately, it appears that the TXRDY signal isn't firing after the last TX FIFO empty interrupt. Looking at the TRM, Table 23-4 seems to indicate that SCI with FIFO only allows for RXERR, RXFFIL, and TXFFIL and TXRDY is only available when not using a FIFO.
Hi Wesley,
Is FIFO mode necessary for this application? If not, do you see the same issue when using non-FIFO mode?
Another option would be to use the CLB. This could take in the SCIA_TX signal as an input, and you could have a counter in the CLB increment whenever the SCI_TX line is high, and reset whenever the SCI_TX is line is low. If the SCI_TX line is high for too long, the counter will reach some match value specified in your CLB configuration, and the HLC in the CLB could trigger an interrupt to configure the SCI_TX line as an input. Let me know if this seems feasible in your application. If so, I would recommend using SysConfig to configure the CLB. Here's a link to the CLB Tool's user guide:
Let me know if you have any further questions.
Thank you,
Luke
Thanks Luke. We've been trying a different tact. I'm attempting to use the APWM mode and signal in the ECAP module to set an interrupt after a short period of time. I created a new thread for the issues that I'm seeing there as we may try something else, but our team rarely uses the ECAP module in our applications, so this seemed like a potential solution.
Okay understood, let me know if you have any further questions on SCI specifically. Otherwise I will close this thread.