TMS320F280025: How to correctly start MPOST and view its running results

Yale,

I wondering if CCS is resetting the device after connection, or loading the active project, etc.  As a simple experiment, ask the customer to do the following after they connect:

1)Manually connect to the target by finding the appropriate target config file(.ccxml) in target configs, right click and "launch selected configuration"

2)Right click on the C28x core and "Connect Target"

3)From the "Run" Item on the top toolbar click and then "Reset" the device

3)From the "Scripts" Item on the top toolbar click and select "EMU Boot" and pick "Flash Boot", I'm assuming that customer is using flash boot mode when they are trying this standalone.  If not, let me know.

3a)This would also be a good time for customer to check that the boot pins are configured correctly for flash boot mode or whichever mode they need

4)From the "Run" Item on the top toolbar click and pick "resume"

The above will emulate booting from flash with the emulator connected.  After a few seconds customer can halt the device(either with the pause or under Run -> Suspend).  Now have them check the M0 SRAM at address 0x6 to see if MPOST has completed.

Best,

Matthew

Hi Matthew,

Thanks for your reply.

My customer followed the process you mentioned. And found that the value of the 0x6 register is still 0000 0000.

And they also had new questions:

1. The 0x4 register is the Boot Mode register, but he did not find a description of this register in the document.

2. Register 0x2 is the Boot ROM Status register. After executing according to your process, the value of this register is 0x0201, which means that it has not started any boot. You can also see in the figure below that the value of register 0x6 is 0000.

boot mode pin:

Z1 configurations:

--

Thanks & Regards

Yale,

Sorry the delay, will try and look/reproduce this today locally.  My thought is that something is over-writing the status here, after the BROM is complete.  Will update after I try it on my HW.

Best,

Matthew

Yale,

There are limitations on running MPOST/reading the status registers that are likely the issue here:

1)From the MPOST Users Guide top of page 5: 

If enabled by configuring customer-OTP, M-POST is executed during every Power-ON reset sequence. Test is executed only during Power-ON reset and not during other resets (XRSn, WDRSn, Debugger reset, and so forth).  

So customer cannot run MPOST with debugger connected, the reset cause must be power on reset

2)Reading the status bits in M0

-All of our examples reserve memory addresses 0x02 - 0x0128 for boot mode status, MPOST status etc.  So customer can connect to a device after power on reset has happened and these locations should be preserved.  However, there is a initialization in the .GEL file that is configured to occur on CCS target connect, that will clear the M0 RAM

OnTargetConnect()
{

*(int *)(MEMCFG_BASE + MEMCFG_O_DXINIT) = 0x0003; /* RAM INIT FOR M0/M1 Memory */
*(int *)(MEMCFG_BASE + MEMCFG_O_LSXINIT) =0x00F0; /* RAM INIT FOR LS4..LS7 Memory */
*(int *)(MEMCFG_BASE + MEMCFG_O_GSXINIT) =0x0001; /* RAM INIT FOR GS0.Memory */

Customer can modify the GEL file by commenting/deleting the first line so that M0/M1 is not initialized.  Go to "Tools->GEL Files" to open up the GEL file dialog box.  Double click the GEL file and find the above line, remove it, then save the file.  Customer will also need to right click on the GEL file in the GEL dialogue and "reload"

3)After the above, customer should observe both boot status and MPOST status at 0x4 and 0x6 have values.  I will advise that after I did this the value in 0x6 did NOT match what is in the MPOST User Guide for any listing.  I need to follow up with design if there is different value for F28002x device than what is listed in the app note.  I already noted that the location for MPOST status in the app note is incorrect.

I will reply back once I find out more on this aspect.  Customer can run as above, but if they also see non-listed value please let me know.

Best,

Matthew

Hi Matthew,

Thanks. The customer has successfully run MPOST and viewed the MPOST results. 

The following are the results of customer operations. They do not use flash boot mode but SCI boot mode:

MatthewPate said:

I need to follow up with design if there is different value for F28002x device than what is listed in the app note.

OK, we are looking forward to your reply.

Additionally, they found that in the 4x device the description about mpost says a time, which is pointed out in the image below. How to test the time used by 2x device mpost?

--

Thanks & Regards

Hi Matthew,

The customer has found this file.

MatthewPate said:

For the time of MPOST, this should be memory size dependent;  F28002x has ~1/4 the SRAM as the F28004x, so this should take ~12,000,000 INTOSC2 cycles @10MHz, or 1.2s

They want to know how these times were measured?

--

Thanks & Regards

Yale,

I don't have an exact answer, but I'm assuming whoever did this on TI side used a GPIO to drive pin for scope detection, then compared time of pin toggle from XRSn de-assert w and without MPOST active?  Is this a concern for the customer, or a doubt in the time estimate?

Best,

Matthew

Hi Matthew,

Thanks for your continuously support.

MatthewPate said:

Is this a concern for the customer, or a doubt in the time estimate?

Because there is no exact documentation on the time required for MPOST testing of 2x device, customers want to try to test the time themselves so that they can better use the device.

--

Thanks & Regards