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Hello, I have working code for fft calculation without CLA. I want to move fft calculation to CLA, for that i am using the following linker file:
//#############################################################################
//
// FILE: f2806x_cla_c_lnk.cmd
//
// TITLE: Linker Command File for CLA Math library examples that run
// on the f2806x platform
//
// This file includes all RAM and FLASH blocks present on the
// f2806x and depending on the active build configuration
// (RAM or FLASH) the appropriate sections will either be loaded
// into RAM or FLASH blocks
//
//###########################################################################
//
//
// $Copyright: Copyright (C) 2023 Texas Instruments Incorporated -
// http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
//
// CLA_C is defined to 1 in the project properties
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
//
//--define=CLA_C=1
//
// CLA_MATH_TABLES_IN_ROM is defined in the project properties according to
// build configuration selected
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
// Set this variable to 1 to use the CLA Math Tables in the CLA Data ROM
// If set to 0, make sure the right CLA Math library (one without the _datarom
// suffix) is used in the project
//
//--define=CLA_MATH_TABLES_IN_ROM=1
//
MEMORY
{
PAGE 0 :
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CLAPROGRAM : origin = 0x009000, length = 0x001000 /* on-chip RAM block L3 */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAML5L8 : origin = 0x00C000, length = 0x008000
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
FLASHH : origin = 0x3D8000, length = 0x004000 /* on-chip FLASH */
FLASHG : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH */
FLASHF : origin = 0x3E0000, length = 0x004000 /* on-chip FLASH */
FLASHE : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH */
FLASHD : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */
FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */
FLASHA : origin = 0x3F4000, length = 0x003F80 /* on-chip FLASH */
ROM : origin = 0x3FF3B0, length = 0x000C10 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
// BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
PAGE 1 :
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
CLARAM0 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 */
CLARAM1 : origin = 0x008C00, length = 0x000400 /* on-chip RAM block L2 */
CLARAM2 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */
RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */
USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */
FLASHB : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH */
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
csmpasswds : > CSM_PWL_P0, PAGE = 0
csm_rsvd : > CSM_RSVD, PAGE = 0
#if defined(RAM)
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.text : > RAML5L8, PAGE = 0
ramfuncs : > RAML5L8, PAGE = 0
.econst : > RAML5L8, PAGE = 0
.switch : > RAMM0, PAGE = 0
Cla1Prog : {_Cla1ProgRunStart = .;} > CLAPROGRAM,
PAGE = 0
#if !(CLA_FFT_TABLES_IN_ROM)
CLA1fftTables : > CLARAM2, PAGE = 1
#endif //CLA_FFT_TABLES_IN_ROM
#elif defined(_FLASH)
.cinit : > FLASHA, PAGE = 0
.pinit : > FLASHA, PAGE = 0
.text : > FLASHA, PAGE = 0
CLA1mathTables : > CLARAM1, PAGE = 1
ramfuncs : LOAD = FLASHD,
RUN = RAML5L8,
LOAD_START(_RamfuncsLoadStart),
RUN_START(_RamfuncsRunStart),
LOAD_SIZE(_RamfuncsLoadSize),
PAGE = 0
.econst : > FLASHA, PAGE = 0
.switch : > FLASHA, PAGE = 0
CLA1fftTables : LOAD = FLASHB,
RUN = CLARAM2,
RUN_START(_CLA1fftTablesRunStart),
LOAD_START(_CLA1fftTablesLoadStart),
LOAD_SIZE(_CLA1fftTablesLoadSize),
PAGE = 1
Cla1Prog : LOAD = FLASHD,
RUN = CLAPROGRAM,
LOAD_START(_Cla1ProgLoadStart),
LOAD_SIZE(_Cla1ProgLoadSize),
RUN_START(_Cla1ProgRunStart),
PAGE = 0
//
//Load tables to Flash and copy over to RAM
//
CLA1mathTables : LOAD = FLASHB,
RUN = CLARAM1,
LOAD_START(_CLA1mathTablesLoadStart),
LOAD_SIZE(_CLA1mathTablesLoadSize),
RUN_START(_CLA1mathTablesRunStart),
PAGE = 1
#else
#error Add either "RAM" or "_FLASH" to C2000 Linker -> Advanced Options -> Command File Preprocessing -> --define
#endif
.stack : > RAML4, PAGE = 1
.ebss : > RAML4, PAGE = 1
.esysmem : > RAML4, PAGE = 1
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
Cla1DataRam0 : > CLARAM0, PAGE = 1
Cla1DataRam1 : > CLARAM1, PAGE = 1
Cla1DataRam2 : > CLARAM2, PAGE = 1
IOBuffer : > RAML4, PAGE = 1
RFFTmag : > RAML4, PAGE = 1
RFFTtwiddles : > RAML4, PAGE = 1
#ifdef CLA_C
.cio : > RAML4, PAGE = 1
//
// CLA C compiler sections
//
// Must be allocated to memory the CLA has write access to
//
.scratchpad : > CLARAM1, PAGE = 1
.bss_cla : > CLARAM0, PAGE = 1
.const_cla : > CLARAM2, PAGE = 1
#endif
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS, PAGE = 0, TYPE = DSECT
}
/*
//=============================================================================
// End of file.
//=============================================================================
*/
And my main code is as follows:
#include "Main.h"
#include "stdbool.h"
#include "application.h"
#include "F2806x_Cla_defines.h"
#include <stdint.h>
//Externs Functions//CLA1fftTables
Uint16 RPM_2wheel= 0;
Uint16 RPM_4wheel = 0;
//#pragma DATA_SECTION(RPM_4wheel,"Cla1ToCpuMsgRAM");
//Uint16 RpmData[2];
#pragma DATA_SECTION(Num,"CpuToCla1MsgRAM");
float Num=0;
#pragma DATA_SECTION(Den,"CpuToCla1MsgRAM");
float Den;
#pragma DATA_SECTION(Res,"Cla1ToCpuMsgRAM");
float Res;
float result;
//
// Defines
//
#define CLA_PROG_ENABLE 0x0001
#define CLARAM0_ENABLE 0x0010
#define CLARAM1_ENABLE 0x0020
#define CLARAM2_ENABLE 0x0040
#define CLA_RAM0CPUE 0x0100
#define CLA_RAM1CPUE 0x0200
#define CLA_RAM2CPUE 0x0400
#define RFFT_SIZE (1 << RFFT_STAGES)
//
// CLA ISRs
//
__interrupt void cla1_task1_isr(void);
__interrupt void cla1_task2_isr(void);
__interrupt void cla1_task3_isr(void);
__interrupt void cla1_task4_isr(void);
__interrupt void cla1_task5_isr(void);
__interrupt void cla1_task6_isr(void);
__interrupt void cla1_task7_isr(void);
__interrupt void cla1_task8_isr(void);
//
// These are defined by the linker file and used to copy
// the CLA code from its load address to its run address
// in CLA program memory
//
extern Uint16 Cla1ProgLoadSize;
extern Uint16 Cla1ProgLoadStart;
extern Uint16 Cla1ProgRunStart;
//
// These are defined by the linker file and used to copy
// the CLA math tables from its load address to its run address
// into one of the CLA data RAMs
//
extern Uint16 Cla1mathTablesLoadStart;
extern Uint16 Cla1mathTablesLoadEnd;
extern Uint16 Cla1mathTablesLoadSize;
extern Uint16 Cla1mathTablesRunStart;
extern __interrupt void Cla1Task1();
extern __interrupt void Cla1Task2();
extern __interrupt void Cla1Task3();
extern __interrupt void Cla1Task4();
extern __interrupt void Cla1Task5();
extern __interrupt void Cla1Task6();
extern __interrupt void Cla1Task7();
extern __interrupt void Cla1Task8();
//Globals
Uint16 Sensor_count= 0 ;
volatile bool FFT_TASK =false;
volatile bool RPM_CALC_TASK =false;
extern Uint16 RPM[10];
//Ram driven Time Dependent Functions
#pragma CODE_SECTION(DSP28x_usDelay, "ramfuncs");
#pragma CODE_SECTION(cpu_timer0_isr, "ramfuncs");
#pragma CODE_SECTION(cpu_timer1_isr, "ramfuncs");
#pragma CODE_SECTION(ecap2_isr, "ramfuncs");
#pragma CODE_SECTION(ADXL_Init, "ramfuncs");
#pragma CODE_SECTION(ADXL_buffer_tick, "ramfuncs");
#pragma CODE_SECTION(Rpm_Display_Init, "ramfuncs");
#pragma CODE_SECTION(FPU_FFT_Tick, "ramfuncs");
#pragma CODE_SECTION(Rpm_Display_Tick, "ramfuncs");
#pragma CODE_SECTION(scia_msg, "ramfuncs");
#pragma CODE_SECTION(spi_init, "ramfuncs");
#pragma CODE_SECTION(spi_fifo_init, "ramfuncs");
#pragma CODE_SECTION(ADXL359_readRegister, "ramfuncs");
#pragma CODE_SECTION(ADXL359_writeRegister, "ramfuncs");
#pragma CODE_SECTION(four_wheeler, "ramfuncs");
// Main
//
void
test_run(void);
void main(void)
{
//
// Step 1. Initialize System Control:
InitSysCtrl();
InitSciGpio();
InitECap2Gpio();
InitSpiaGpio();
InitECapture();
InitI2CGpio();
InitGpio_Button();
//
// Disable CPU interrupts and clear all CPU interrupt flags
DINT;
//
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
// <Step 2>: use void * memcpy ( void * destination, const void * source, size_t num )
// to copy over the "Cla1Prog" and ".const_cla" sections from Flash to RAM
memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
(uint32_t)&Cla1ProgLoadSize );
// memcpy((uint32_t *)&Cla1ConstRunStart, (uint32_t *)&Cla1ConstLoadStart,
// (uint32_t)&Cla1ConstLoadSize );
//
// Assign user defined ISR to the PIE vector table
//
EALLOW;
PieVectTable.CLA1_INT1 = &cla1_task1_isr;
PieVectTable.CLA1_INT2 = &cla1_task2_isr;
PieVectTable.CLA1_INT3 = &cla1_task3_isr;
PieVectTable.CLA1_INT4 = &cla1_task4_isr;
PieVectTable.CLA1_INT5 = &cla1_task5_isr;
PieVectTable.CLA1_INT6 = &cla1_task6_isr;
PieVectTable.CLA1_INT7 = &cla1_task7_isr;
PieVectTable.CLA1_INT8 = &cla1_task8_isr;
EDIS;
//
// Compute all CLA task vectors
//
EALLOW;
Cla1Regs.MVECT1 = (Uint16)((Uint32)&Cla1Task1 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT2 = (Uint16)((Uint32)&Cla1Task2 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT3 = (Uint16)((Uint32)&Cla1Task3 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT4 = (Uint16)((Uint32)&Cla1Task4 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT5 = (Uint16)((Uint32)&Cla1Task5 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT6 = (Uint16)((Uint32)&Cla1Task6 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT7 = (Uint16)((Uint32)&Cla1Task7 -(Uint32)&Cla1ProgRunStart);
Cla1Regs.MVECT8 = (Uint16)((Uint32)&Cla1Task8 -(Uint32)&Cla1ProgRunStart);
EDIS;
//
// Step 3 : Mapping CLA tasks
// All tasks are enabled and will be started by an ePWM trigger
// Map CLA program memory to the CLA and enable software breakpoints
//
EALLOW;
Cla1Regs.MPISRCSEL1.bit.PERINT1SEL = CLA_INT1_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT2SEL = CLA_INT2_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT3SEL = CLA_INT3_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT4SEL = CLA_INT4_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT5SEL = CLA_INT5_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT6SEL = CLA_INT6_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT7SEL = CLA_INT7_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT8SEL = CLA_INT8_NONE;
Cla1Regs.MIER.all = 0x00FF;
EDIS;
// Call Flash Initialization to setup flash waitstates
// This function must reside in RAM
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);
//Peripherals Initialization
//I2C A initialization
I2CA_Init();
// Initialize the SPI and SCI FIFO
spi_init();
spi_fifo_init();
// Initialize SCI and SCI FIFO
scia_echoback_init();
scia_fifo_init();
InitFlash();
//Initialize ADXL Vibration Sensor
ADXL_Init();
//Initialize LCD Display
Rpm_Display_Init();
// DISPLAY_TASK = true;
//Initialize Ring Buffer to store sensor data
ADXL_buffer_Init(&ADXL_ringBuffer_X, (Uint8*)test_input, sizeof(test_input));
ADXL_buffer_Init(&ADXL_ringBuffer_Y, (Uint8*)test_inputY, sizeof(test_inputY));
ADXL_buffer_Init(&ADXL_ringBuffer_Z, (Uint8*)test_inputZ, sizeof(test_inputZ));
// Initialize Timers
// Timer_Init(); // Initialize Timer for Cyclic Interrupt
// Initialize GPIO pin for push button to switch between 2 wheeler and 4 Wheeler
init_button(pButton);
memset(RPM, 0 ,sizeof(RPM));
//
// Enable CLA interrupts at the group and subgroup levels
//
PieCtrlRegs.PIEIER11.all = 0xFFFF;
IER = (M_INT11 );
Timer_Init();
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// Switch the CLA program space to the CLA and enable software forcing
// Also switch over CLA data ram 0,1 and 2
// CAUTION: The RAMxCPUE bits can only be enabled by writing to the
// register and not the individual bit field. Furthermore, the status of
// these bitfields is not reflected in either the watch or register views -
// they always read as zeros. This is a known bug and the user is advised
// to test CPU accessibilty first before proceeding
EALLOW;
//Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE|CLARAM0_ENABLE|CLARAM1_ENABLE|CLA_RAM1CPUE;//CLARAM2_ENABLE|
Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE|CLARAM0_ENABLE|CLARAM1_ENABLE|
CLARAM2_ENABLE|CLA_RAM1CPUE;
Cla1Regs.MCTL.bit.IACKE = 1;
EDIS;
//Infinite Loop
while(1)
{
task_scheduler();
}
}
//
// CLA ISRs
//
__interrupt void
cla1_task1_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task2_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task3_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task4_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task5_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task6_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task7_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
__interrupt void
cla1_task8_isr(void)
{
PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}
// End of File
//
void
test_run(void)
{
Cla1ForceTask1andWait();
result = Res;
puts("*");
}
In my while loop i am calling this function to calculate fft as 
int FPU_FFT_Tick()
{
// Locals
Uint16 tempRPM=0;
float fft_size = RFFT_SIZE;
Uint16 RPM_4wheel_X = 0;
Uint16 RPM_4wheel_Y = 0;
Uint16 RPM_4wheel_Z = 0;
static Uint16 j=0;
{
Uint16 i=0;
for(i=0; i < RFFT_SIZE; i++){
IOBuffer[i] = test_input[i];
}
}
hnd_rfft->FFTSize = RFFT_SIZE;
hnd_rfft->FFTStages = RFFT_STAGES;
hnd_rfft->InBuf = &IOBuffer[0]; //Input buffer
hnd_rfft->OutBuf = &IOBuffer2[0]; //Output buffer
hnd_rfft->MagBuf = &RFFTmagBuff[0]; //Magnitude buffer
hnd_rfft->CosSinBuf = &RFFTF32Coef[0]; //Twiddle factor buffer
RFFT_f32_sincostable(hnd_rfft); //Calculate twiddle factor
{
Uint16 i=0;
for (i=0; i < RFFT_SIZE; i++){
IOBuffer2[i] = 0; //Clean up output buffer
}
}
{
Uint16 i=0;
for (i=0; i <= RFFT_SIZE/2; i++){
RFFTmagBuff[i] = 0; //Clean up magnitude buffer
}
}
#ifdef RUN_CLA
test_run();
#else
RFFT_f32(hnd_rfft); //Calculate real FFT
RFFT_f32_mag(hnd_rfft); //Calculate magnitude
#endif
// hnd_rfft->PhaseBuf = &RFFTmagBuff[0]; //Use magnitude buffer
{
Uint16 i=1;
for (i =1; i <= RFFT_SIZE/2; ++i)
{
if ((RFFTmagBuff[i] > maxMagnitude) )
{ //&& (IOBuffer2[i] < 20)// && maxMagnitude < 40
maxMagnitude = RFFTmagBuff[i];
peakIndex = i;
}
}
}
frequency = (Fs * peakIndex) / (fft_size);
if(maxMagnitude<3)
{
RPM_4wheel_X = 0;
}
else
{
RPM_4wheel_X= RPM_Value(frequency,4);
}
//// RPM in Y AXIS
{
Uint16 i=0;
for(i=0; i < RFFT_SIZE; i++){
IOBuffer[i] = test_inputY[i];
}
}
hnd_rfft->FFTSize = RFFT_SIZE;
hnd_rfft->FFTStages = RFFT_STAGES;
hnd_rfft->InBuf = &IOBuffer[0]; //Input buffer
hnd_rfft->OutBuf = &IOBuffer2[0]; //Output buffer
hnd_rfft->MagBuf = &RFFTmagBuff[0]; //Magnitude buffer
hnd_rfft->CosSinBuf = &RFFTF32Coef[0]; //Twiddle factor buffer
RFFT_f32_sincostable(hnd_rfft); //Calculate twiddle factor
{
Uint16 i=0;
for (i=0; i < RFFT_SIZE; i++){
IOBuffer2[i] = 0; //Clean up output buffer
}
}
{
Uint16 i=0;
for (i=0; i <= RFFT_SIZE/2; i++){
RFFTmagBuff[i] = 0; //Clean up magnitude buffer
}
}
#ifdef RUN_CLA
test_run();
#else
RFFT_f32(hnd_rfft); //Calculate real FFT
RFFT_f32_mag(hnd_rfft); //Calculate magnitude
#endif
// hnd_rfft->PhaseBuf = &RFFTmagBuff[0]; //Use magnitude buffer
{
Uint16 i=1;
for (i =1; i <= RFFT_SIZE/2; ++i)
{
if ((RFFTmagBuff[i] > maxMagnitude) )
{
maxMagnitude = RFFTmagBuff[i];
peakIndex = i;
}
}
}
frequency = (Fs * peakIndex) / (fft_size);
if(maxMagnitude<3)
{
RPM_4wheel_Y = 0;
}
else
{
RPM_4wheel_Y= RPM_Value(frequency,4);
}
// RPM in Z AXIS
{
Uint16 i=0;
for(i=0; i < RFFT_SIZE; i++){
IOBuffer[i] = test_inputZ[i];
}
}
hnd_rfft->FFTSize = RFFT_SIZE;
hnd_rfft->FFTStages = RFFT_STAGES;
hnd_rfft->InBuf = &IOBuffer[0]; //Input buffer
hnd_rfft->OutBuf = &IOBuffer2[0]; //Output buffer
hnd_rfft->MagBuf = &RFFTmagBuff[0]; //Magnitude buffer
hnd_rfft->CosSinBuf = &RFFTF32Coef[0]; //Twiddle factor buffer
RFFT_f32_sincostable(hnd_rfft); //Calculate twiddle factor
{
Uint16 i=0;
for (i=0; i < RFFT_SIZE; i++){
IOBuffer2[i] = 0; //Clean up output buffer
}
}
{
Uint16 i=0;
for (i=0; i <= RFFT_SIZE/2; i++){
RFFTmagBuff[i] = 0; //Clean up magnitude buffer
}
}
#ifdef RUN_CLA
test_run();
#else
RFFT_f32(hnd_rfft); //Calculate real FFT
RFFT_f32_mag(hnd_rfft); //Calculate magnitude
#endif
// hnd_rfft->PhaseBuf = &RFFTmagBuff[0]; //Use magnitude buffer
{
Uint16 i=1;
for (i =1; i <= RFFT_SIZE/2; ++i)
{
if ((RFFTmagBuff[i] > maxMagnitude) )
{ //&& (IOBuffer2[i] < 20)// && maxMagnitude < 40
maxMagnitude = RFFTmagBuff[i];
peakIndex = i;
}
}
}
frequency = (Fs * peakIndex) / (fft_size);
if(maxMagnitude<3)
{
RPM_4wheel_Z = 0;
}
else
{
RPM_4wheel_Z = RPM_Value(frequency,4);
}
if(((RPM_4wheel_X != RPM_4wheel_Y) && (RPM_4wheel_Y != RPM_4wheel_Z)))
{
return 1;
}
else if((RPM_4wheel_X != RPM_4wheel_Y) || (RPM_4wheel_Y != RPM_4wheel_Z) || (RPM_4wheel_X != RPM_4wheel_Y))
{
if((RPM_4wheel_X == RPM_4wheel_Y))
{
RPM_4wheel_Z = RPM_4wheel_Y;
}
else if((RPM_4wheel_Z == RPM_4wheel_Y))
{
RPM_4wheel_X = RPM_4wheel_Y;
}
else if((RPM_4wheel_Z == RPM_4wheel_X))
{
RPM_4wheel_Y = RPM_4wheel_X;
}
RPM[j] =RPM_4wheel_Z;// (RPM_4wheel_X + RPM_4wheel_Y + RPM_4wheel_Z)/3;
}
else
{
RPM[j] = RPM_4wheel_Z;//(RPM_4wheel_X + RPM_4wheel_Y + RPM_4wheel_Z)/3;
}
if((j >= 2) && ((RPM[j] - RPM[j-1]) > 30) && ((RPM[j]-RPM[j-2]) < 20))
{
RPM[j-1] = RPM[j];
}
if((j<2 && (RPM[1] - RPM[0])> 30) && ((RPM[1] - RPM[4])< 20))
{
RPM[0] = RPM[1];
}
j++;
//
if(j>4) {j=0;}
{
Uint16 i=0;
for(i=0;i<5;i++)
{
tempRPM += RPM[i];
}
tempRPM = tempRPM/5;
}
RPM_4wheel =tempRPM;
maxMagnitude = 0;
// End of test
// done();
// Execution never reaches this point
return 1;
}
the problem is that when i am enabling RUN_CLA macro, It is not calculating fft, instead i am getting blank data on IOBuffer2 and RFFTmagBuff.
And my CLA file is as follows:
__interrupt void
Cla1Task1 (void)
{
__mdebugstop();
CLA_CFFT_run256Pt();
Res = Num/Den;
CLA_CFFT_unpack256Pt();
}
Please tell me what am I doing wrong in CLA configuration or buffers memory section assignment , why it is not working, Is there any reference available for CLA FFT calculation in this controller.
Hi Sanjay,
Linked here is a workshop video that shows how to migrate FFT calculation code over to the CLA. Can you try running the code shown here in a F2806x project? The project files can be downloaded at the bottom of the page. This example uses a F2937D, which has some slight CLA module enhancements from the F2806x, but I don't believe that should be an issue.
Below are some other threads discussing FFT calculation on the CLA for your reference as well.
Best Regards,
Delaney
