TMS320F28388D: Issue with Bi-Directional Data Exchange between CPU1 and CPU2 on DSP28388D Using Shared RAM

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Dear TI experts,

Here is the problem I have encountered:

Problem Description

Objective: To enable bi-directional data exchange between CPU1 and CPU2 on the Texas Instruments DSP28388D using shared RAM sections (ramgs1 and ramgs2). Specifically:

• CPU1 should update Vin, Vo, and Io, which should be readable by CPU2.
• CPU2 should update theta, alpha, and fsw, which should be readable by CPU1.

Issue: While CPU1 successfully updates the variables Vin, Vo, and Io and CPU2 can read these values, the variables theta, alpha, and fsw updated by CPU2 are not being reflected in both CPU1 and CPU2. Despite configuring the shared RAM sections correctly, CPU2's updates do not appear to persist.

Code:

(1) CMD code:

MEMORY
{
...
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1 : origin = 0x00E000, length = 0x001000
RAMGS2 : origin = 0x00F000, length = 0x001000
...
}

SECTIONS
{
...
ramgs0 : > RAMGS0, type = NOINIT
ramgs1 : > RAMGS1, type = NOINIT
ramgs2 : > RAMGS2, type = NOINIT
...
}

(2)CPU1 Code:

#include "driverlib.h"
#include "device.h"

// Globals
volatile float theta;
volatile float alpha;
volatile float fsw;
volatile float Vin;
volatile float Vo;
volatile float Io;

#pragma DATA_SECTION(theta, "ramgs1");
#pragma DATA_SECTION(alpha, "ramgs1");
#pragma DATA_SECTION(fsw, "ramgs1");
#pragma DATA_SECTION(Vin, "ramgs2");
#pragma DATA_SECTION(Vo, "ramgs2");
#pragma DATA_SECTION(Io, "ramgs2");

float localTheta;
float localAlpha;
float localFsw;

void main(void)
{
Device_init();
Device_initGPIO();

// Enable Global Shared RAM for CPU1 to write to GS2 and read from GS1
MemCfg_setGSRAMMasterSel(MEMCFG_SECT_GS2, MEMCFG_GSRAMMASTER_CPU1);
MemCfg_setGSRAMMasterSel(MEMCFG_SECT_GS1, MEMCFG_GSRAMMASTER_CPU1);

while(1)
{
Vin = 29.5;
Vo = 39.5;
Io = 49.5;

localTheta = theta;
localAlpha = alpha;
localFsw = fsw;

DEVICE_DELAY_US(100000);
}
}

(3) CPU2 code

#include "driverlib.h"
#include "device.h"

// Globals
volatile float theta;
volatile float alpha;
volatile float fsw;
volatile float Vin;
volatile float Vo;
volatile float Io;

#pragma DATA_SECTION(theta, "ramgs1");
#pragma DATA_SECTION(alpha, "ramgs1");
#pragma DATA_SECTION(fsw, "ramgs1");
#pragma DATA_SECTION(Vin, "ramgs2");
#pragma DATA_SECTION(Vo, "ramgs2");
#pragma DATA_SECTION(Io, "ramgs2");

float localVin;
float localVo;
float localIo;

void main(void)
{
Device_init();
Device_initGPIO();

// Enable Global Shared RAM for CPU2 to write to GS1 and read from GS2
MemCfg_setGSRAMMasterSel(MEMCFG_SECT_GS1, MEMCFG_GSRAMMASTER_CPU2);
MemCfg_setGSRAMMasterSel(MEMCFG_SECT_GS2, MEMCFG_GSRAMMASTER_CPU2);

while(1)
{
theta = 2.3;
alpha = 3.3;
fsw = 200000.3;

localVin = Vin;
localVo = Vo;
localIo = Io;

DEVICE_DELAY_US(100000);
}
}

Observations

1. CPU1 correctly writes to Vin, Vo, and Io, and CPU2 reads these values successfully.
2. CPU1 and CPU2 do not see the updated values for  theta, alpha, and fsw which should be written by CPU2.

Request for Assistance

We need guidance on:

1. Correctly configuring the shared memory for bi-directional access between CPU1 and CPU2.
2. Ensuring that CPU2 updates to theta, alpha, and fsw are visible to CPU1 and CPU2.

Thanks,
Eric