TMS320F28379D: Interrupt latency to trigger CLA task

Hi Mark,

Mark Feller said:

The ADC Interrupt triggers a CPU1 CLA task.  This is the only CPU1 CLA task configured.

Just to clarify, are you doing a software trigger of the CPU1 CLA task? Or is the task being triggered by the ADC event?

Is the following chain of events correct:

1. CPU2 CLA task (1st GPIO set) -> triggers ADC conversions SOC7-10 
2. branch to ADC ISR -> software trigger CPU1 CLA task
3. CPU1 CLA task starts (2nd GPIO set)

Since the CLA tasks are being done on different CPU CLAs, they should not be affected by each other or by anything on the CPUs. 

Best Regards,

Delaney

Hello Delaney,

The CPU1 CLA task is being triggered by the ADC event

1. CPU2 CLA task (1st GPIO set) -> triggers ADC conversions SOC7-10 
2. ADCC Interrupt 1 triggers CPU1 CLA task start (2nd GPIO set)

Thanks,

Hi Mark,

Alright I see, since your CLA task on CPU1 CLA is its only task, it should start immediately when triggered. The difference in latency should be related to the ADC conversions themselves then, so I will loop in an ADC expert to see if they have any input here.

Best Regards,

Delaney

Mark,

Mark Feller said:

...It is possible that up to two other ADC channels are being converted.  (SOC0, SOC1).  While this may delay SOC7/SOC8/SOC9/SOC10, I would not expect this to add more than 1 or 2 us to the conversion time, and should not cause a 40us latency.

What is your aCQPS value? Unless it is very high, I agree that each ADC conversion should take less than 1us.

Best Regards,

Ben Collier

ACQPS is 15 for all channels.

I am trying to create a stand-alone project that I can share that illustrates the issue.  I am having a couple of issues here:

1.  EPWM_forceADCTrigger(EPWM1_BASE, EPWM_SOC_A); on CPU2 CLA does not seem to be triggering the conversion.  

--I set SOCA prescale to 15

--I periodically clear the SOCA event count so it never reaches 15

--When needed, I use EPWM_forceADCTrigger and skip clearing the SOCA event count

In CPU2 CLA task1 triggered by the EPWM1 interrupt:

if (tableindex == 0){

EPWM_forceADCTrigger(EPWM1_BASE, EPWM_SOC_A);

}
else if (tableindex == 10){
// Reset event count periodically, make sure event count never gets to the prescale=15
EPWM_forceADCTriggerEventCountInit(EPWM1_BASE, EPWM_SOC_A);
EPWM_clearADCTriggerFlag(EPWM1_BASE, EPWM_SOC_A); // EPWM1 SOCA
}

tableindex++;
if (tableindex >= 20)
tableindex = 0;

For the above, my expectation is that the ADC conversion will be triggered on every 20 pulses of EPWM1

2. If I disable the code snippet from above, skip the use of EPWM_forceADCTrigger, and set prescale to 8 for example, the conversion is triggered.  CPU1 CLA is triggered by CLA_TRIGGER_ADCC1.  But it only runs if I also have a CPU interrupt enabled.  CPU1 CLA does not run if I do not have the CPU interrupt configured.  I would like to have CPU1 CLA triggered by ADCC1 by itself.

Is it possible to send you the project by PM to provide more detail on what I am doing?

Thanks,

Mark

I think it may be related to this:

EPWM_enableADCTriggerEventCountInit(EPWM1_BASE, EPWM_SOC_A);
EPWM_setADCTriggerEventCountInitValue(EPWM1_BASE, EPWM_SOC_A, 0);

When I disable the above lines, the prescaled trigger works.  When enabled, it does not work.

I used the above in an attempt to clear the SOCA event count, and keep the SOCA event count so that it never reaches the prescale value and it never triggers an ADC conversion.  So the only way to trigger the ADC conversion is by EPWM_forceADCTrigger.  

Reading the TRM, the Event Trigger Counter is initialized by a SYNC event or software force.  As a guess, the SYNC event is getting in the way of what I am trying to do.  

Is there any other way to clear the SOCA event count to zero?

Thanks,