Part Number: TMS320F28388D
Tool/software:
Team,
The F28388D seems to support some trace functionality according to the datasheet (SPRSP14E) section 7.14 and TRM (SPRUII0F) section 41.11 :
What is not clear is how to make use of the two trace capabilities (SWO trace / Five-pin and parallel trace) that are listed.
The below E2E post does provide some information but it is not complete:
https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/936085/tms320f28388d-debugging
Can you please clarify the below:
1)The below table gives the features supported by the different JTAG emulators:
https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds_target_connection_guide.html#xds-features
So SWO trace requires an XDS110 and an XDS200.
-But what does the "Five-pin and parallel trace" refer to in the table? Core Pin trace or System Pin trace?
2) Are the associated design guideline for trace from the " Emulation and Trace Headers TRM" as well valid for the F28388D "Five-pin and parallel trace" interface?
3) What tools and JTAG emulator do we advise to make use of "Five-pin and parallel trace"?
4) How does the ERAD module (TRM Chap 14) relates to the SWO trace / Five-pin and parallel trace capabilities?
For example how does the Program counter trace (PCT) relates to the two traces mode above?
Can the ERAD features be used equally with the two trace modes?
5) Do we have an HW implementation example of SWO trace / Five-pin and parallel trace capabilities available?
For examples a schematics on how the trace interface is routed to the connector?
Thanks in advance!
Anthony
