• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 81 subscribers
  • Views 388 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28388D: Diagnostic Example code is not working on core 2

Vikram Tathe
Prodigy 175 points

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hello Team,

I am using TMS320f28388D and I want to execute diagnostics tests on both cores. I have successfully executed the example code on Core1  and modified the compiler option predefined symbols to "CPU2" but unfortunately, it is not working as expected - I don't see any output on the UART. 

Diagnostic Reference code -  C2000Ware_5_02_00_00\libraries\diagnostic\f2838x\examples\test_application

What all more changes required to execute Diagnostic Tests on CPU core2?

Could you please share the example code that run on CPU2?

Thanks & Regards,

Vikram Tathe

  • +1
    TI__Guru 54795 points

    I can think of a few changes off the top of my head--

    • I already replied about the UART prints here
    • Like SCI, CAN and MCAN also need to be assigned to one CPU or the other
    • There is a semaphore for HWBIST that needs to be claimed by a CPU before it can be tested
    • If you are performing memory tests on any of the global shared (GS) RAMs, you'll need to again make sure those are assigned to the CPU doing the testing
    • Some tests will issue NMIs to both CPUs, so you need to make sure that both CPUs have NMI handlers ready to clear those flags or else you'll get some unwanted NMIWD resets

    Although most of these tests can be run from both CPUs, it's not necessary to run them all from both CPUs. For example, since CPU1 and CPU2 share an MCAN instance, you don't really need to test its ECC logic from both CPUs. However, things like dedicated RAMs and the CPUs themselves will need to be tested from each core.

    Whitney

  • 0 in reply to Whitney Dewey
    Prodigy 175 points

    Hello

    Thanks for the detailed information.

    I have a query on memory test.

    API:

    void STL_March_testRAMCopy ( const STL_March_Pattern pattern, const uint32_t startAddress, const uint32_t length, const uint32_t copyAddress )

    1. pattern - I have Clear understanding


    2. startAddress - In the example code, the custom data is filled in the buffer and that buffer is placed at the memory location to be tested. The custom/known data is used only to verify that the data is copied to the backup location and that it is restored after testing. Ultimately, the start address of the buffer is the same as the start address of the memory location to be tested. Instead, I can directly put the address of memory to be tested. Please correct me if my understanding is wrong. 


    3. length -  In the example code, the length calculation (STA_USER_MARCH_DATA_SIZE / 2U) - 1U equates to ((16U / 2U) - 1U) = (8U - 1U) = 7U so the length is 7.The calculations are not clear to me. Could you please clarify? If I want to test M0 memory block having length 1K, shall I put 1024 as the length directly?


    4. copyAddress - Shall I put the direct destination address here where the backup is stored during test execution?

    Example code:

    #define STA_USER_MARCH_DATA_SIZE        16U
#define STA_USER_MARCH_COPY_SIZE        320U


#pragma DATA_SECTION(STA_User_marchTestData, "ramm0");
#pragma DATA_ALIGN(STA_User_marchTestData, 2)
uint16_t STA_User_marchTestData[STA_USER_MARCH_DATA_SIZE];

#pragma DATA_ALIGN(STA_User_marchTestDataCopy, 2)
uint16_t STA_User_marchTestDataCopy[STA_USER_MARCH_COPY_SIZE];


//********************* March Test ******************************************//

STL_March_testRAMCopy(STL_MARCH_PATTERN_ONE,
                                  (uint32_t)STA_User_marchTestData,
                                  (STA_USER_MARCH_DATA_SIZE / 2U) - 1U,
                                  (uint32_t)STA_User_marchTestDataCopy);
								  
uint16_t returnVal = STL_March_checkErrorStatus();

//********************* March Copy Test ******************************************//


STL_March_testRAMCopy(STL_MARCH_PATTERN_ONE,
                                  (uint32_t)STA_User_marchTestData,
                                  (STA_USER_MARCH_DATA_SIZE / 2U) - 1U,
                                  (uint32_t)STA_User_marchTestDataCopy);
uint16_t returnVal = STL_March_checkErrorStatus();

    We want to test M0, M1, D0, D1, LS0 to LS7, and GS0 to GS14. GS15 memory block having size of 4K will be used for backup purposes, as all the memory blocks to be tested have a size of 4K or less.

    Planning to use API as below. 

    STL_March_testRAMCopy ( STL_MARCH_PATTERN_ONE, 0x00, 1024, 0x1C000); // M0 memory having size 1K and will store backup at GS15

    STL_March_testRAMCopy ( STL_MARCH_PATTERN_ONE, 0xD000, 4096, 0x1C000); // GS0 memory having size 1K and will store backup at GS15

    STL_March_testRAMCopy ( STL_MARCH_PATTERN_ONE, 0x8000, 2048, 0x1C000); // LS0 memory having size 1K and will store backup at GS15

    Could you please confirm that my understanding is correct or am I missing anything?

    Thanks & Regards,

    Vikram Tathe

  • +1 in reply to Vikram Tathe
    TI__Guru 54795 points

    If you look at the documentation, the description of the length parameter is "length is the number of 32-bit words of the memory test minus 1." So for M0, since it is 1024 16-bit words, you would pass 511 as the length (1024/2 - 1). Your understanding of the other parameters appears to be correct though.

    Whitney