TMS320F28379D: PWM Duty extending in multi-phase variable frequency operation

// ePWM Phase Shift and T1 Workaround.
//
// This is the DriverLib epwm_ex3_synchronization example modified.
//
// This file configures EPWM1A to GPIO0 and and EPWM2A to GPIO2.
// EPWM1A:
//    - High on CTR = 0
//    - Sync-Out pulse on CTR = CMPB = 500
//    - Low on CMPA = 1000
//    - PRD = 2000
//
// EPWM2A:
//    - High on CTR = 0
//    - Low on CMPA = 1000
//    - PRD = 2000
//    - TBPHS = 1500 (sync-in is EPWM1 sync-out = 500)
//
// The example demonstrates a missing EPWM2A action qualifier in the first cycle due to phase shift.
// The workaround is implemented in main() by using the T1 AQ to carry out the missed action qualifier
// due to TBPHS (1500) being greater than CMPA (1000) with phase shift (on CMPB - 500) occurring before
// CMPA.
//
// To see the effect, place probes on GPIO0 and GPIO2.
// Run the code with the workaround 'if' loop in main() commented out.
// The result is an unwanted longer pulse in the first cycle of EPWM2A.
// Un-comment the 'if' loop in main() and rerun to see the desired phase shift occur.
//

//
// Included Files
//
#include "driverlib.h"
#include "device.h"
#include "board.h"

#define EPWM_TIMER_TBPRD    2000
#define EPWM_CMPA           1000
#define EPWM_CMPB           1000
#define EPWM_TBPHS          1500

//
// Function Prototypes
//
void initEPWM(uint32_t base);

__interrupt void epwm1ISR(void);
__interrupt void epwm2ISR(void);

//
// Main
//
void main(void)
{
    //
    // Initialize device clock and peripherals
    //
    Device_init();

    //
    // Disable pin locks and enable internal pull ups.
    //
    Device_initGPIO();

    //
    // Initialize PIE and clear PIE registers. Disables CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    //
    // Assign the interrupt service routines to ePWM interrupts
    //
    Interrupt_register(INT_EPWM1, &epwm1ISR);
    Interrupt_register(INT_EPWM2, &epwm2ISR);

    //
    // Configure GPIO0/1 , GPIO2/3 and GPIO4/5 and GPIO6/7 as
    // ePWM1A/1B, ePWM2A/2B, ePWM3A/3B, ePWM4A/4B pins respectively, set up output XBAR for extsyncout on GPIO24
    //
    Board_init();

    // Disable sync(Freeze clock to PWM as well). GTBCLKSYNC is applicable
    // only for multiple core devices. Uncomment the below statement if
    // applicable.
    //
    // SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_GTBCLKSYNC);
    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

    //
    // Initialize PWM1 without phase shift as master
    //
    initEPWM(myEPWM1_BASE);

    //
    // Initialize PWM2 with phase shift of 1500 TBCLKs
    //
    initEPWM(myEPWM2_BASE);

    EPWM_selectPeriodLoadEvent(myEPWM2_BASE, EPWM_SHADOW_LOAD_MODE_SYNC);
    EPWM_setPhaseShift(myEPWM2_BASE, EPWM_TBPHS);
    EPWM_setTimeBaseCounter(myEPWM2_BASE, 0);

    //
    // ePWM1 SYNCO is generated on CTR = CMPB = 500
    //
    EPWM_setSyncOutPulseMode(EPWM1_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_COMPARE_B);

    //
    // ePWM2 uses the ePWM 1 SYNCO as its SYNCIN.
    // ePWM2 SYNCO is generated from its SYNCIN, which is ePWM1 SYNCO
    //
    EPWM_setSyncOutPulseMode(myEPWM2_BASE, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN);

    //
    // Enable all phase shifts.
    //
    EPWM_enablePhaseShiftLoad(myEPWM2_BASE);

    //
    // Enable sync and clock to PWM
    //
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

    //
    // Enable ePWM interrupts
    //
    Interrupt_enable(INT_EPWM1);
    Interrupt_enable(INT_EPWM2);

    //
    // Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
    //
    EINT;
    ERTM;

    //
    // IDLE loop.
    //
    for(;;)
    {
        //
        // WORKAROUND LOOP. Check if TBPHS is greater than CMPA.
        // Un-comment this section to implement the workaround.
        //
//        if(EPWM_TBPHS > EPWM_CMPA)
//        {
//            //
//            // If true, then use the sync-in pulse as the T1 action qualifier event and perform the action that would be skipped by the phase shift.
//            //
//            EPWM_setActionQualifierT1TriggerSource(myEPWM2_BASE, EPWM_AQ_TRIGGER_EVENT_TRIG_EPWM_SYNCIN);
//            EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_T1_COUNT_UP);
//        }
//        else
//        {
//            //
//            // If false, then T1 action is not needed, so do nothing on T1 events.
//            //
//            EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_T1_COUNT_UP);
//        }

    }
}

//
// epwm1ISR - ePWM 1 ISR
//
__interrupt void epwm1ISR(void)
{
    //
    // Clear INT flag for this timer
    //
    EPWM_clearEventTriggerInterruptFlag(myEPWM1_BASE);

    //
    // Acknowledge interrupt group
    //
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP3);
}

//
// epwm2ISR - ePWM 2 ISR
//
__interrupt void epwm2ISR(void)
{
    //
    // Clear INT flag for this timer
    //
    EPWM_clearEventTriggerInterruptFlag(myEPWM2_BASE);

    //
    // Acknowledge interrupt group
    //
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP3);
}


void initEPWM(uint32_t base)
{
    //
    // Set-up TBCLK
    //
    EPWM_setTimeBasePeriod(base, EPWM_TIMER_TBPRD);
    EPWM_setPhaseShift(base, 0U);
    EPWM_setTimeBaseCounter(base, 0U);

    //
    // Set Compare values
    //
    EPWM_setCounterCompareValue(base,
                                EPWM_COUNTER_COMPARE_A,
                                EPWM_CMPA);
    EPWM_setCounterCompareValue(base,
                                EPWM_COUNTER_COMPARE_B,
                                EPWM_CMPB);

    //
    // Set up counter mode
    //
    EPWM_setTimeBaseCounterMode(base, EPWM_COUNTER_MODE_UP);

    EPWM_disablePhaseShiftLoad(base);

    EPWM_setClockPrescaler(base,
                           EPWM_CLOCK_DIVIDER_8,
                           EPWM_HSCLOCK_DIVIDER_1);

    //
    // Set up shadowing
    //
    EPWM_setCounterCompareShadowLoadMode(base,
                                         EPWM_COUNTER_COMPARE_A,
                                         EPWM_COMP_LOAD_ON_CNTR_ZERO);
    EPWM_setCounterCompareShadowLoadMode(base,
                                         EPWM_COUNTER_COMPARE_B,
                                         EPWM_COMP_LOAD_ON_CNTR_ZERO);

    //
    // Set actions
    //
    EPWM_setActionQualifierAction(base,
                                  EPWM_AQ_OUTPUT_A,
                                  EPWM_AQ_OUTPUT_HIGH,
                                  EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    EPWM_setActionQualifierAction(base,
                                  EPWM_AQ_OUTPUT_B,
                                  EPWM_AQ_OUTPUT_HIGH,
                                  EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    EPWM_setActionQualifierAction(base,
                                  EPWM_AQ_OUTPUT_A,
                                  EPWM_AQ_OUTPUT_LOW,
                                  EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    EPWM_setActionQualifierAction(base,
                                  EPWM_AQ_OUTPUT_B,
                                  EPWM_AQ_OUTPUT_LOW,
                                  EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);


    //
    // Interrupt where we will change the Compare Values
    // Select INT on Time base counter zero event,
    // Enable INT, generate INT on 1rd event
    //
    EPWM_setInterruptSource(base, EPWM_INT_TBCTR_ZERO);
    EPWM_enableInterrupt(base);
    EPWM_setInterruptEventCount(base, 1U);
}