Tool/software:
Hello,
After testing the example code "adc_ex15_open_shorts_detection.c", I would like to know more details about the following topics:
OP_01: osDetectStatusVal can be ADC_OSDETECT_STATUS_UNDETERMINED (value 16) at the end of the test, which can be considered wrongly as good/ valid state.
" Due to high drive impedance, a S+H duration much longer than the ADC minimum will be needed."
OP_02: Is this the reason why a sample window of 640ns was chosen? I would like to know more details regarding "high drive impedance" and "ADC minimum"?
OP_03: I would like to know why "open/shorts detection" action is performed 7 times.
OP_04: I would like to know why ADC_CLK_DIV_4_0 was chosen.
OP_05: I would like to know why ADC_PULSE_END_OF_CONV was chosen.
ADC_enableConverter(adcBase);
DEVICE_DELAY_US(1000);
OP_06: I would like to know why additional delay is necessary, since the previous function call introduces at least a 500us delay before sampling:
In addition, we need to understand why we have different results on different channels. Shall we test all the channels, or is enough to test one (or a limited number)?
|
Channel |
Status test 1 |
Status test 2 |
|
[0] |
0 |
8 |
|
[1] |
0 |
8 |
|
[2] |
8 |
8 |
|
[3] |
0 |
8 |
|
[4] |
8 |
8 |
|
[5] |
0 |
8 |
|
[6] |
0 |
0 |
|
[7] |
0 |
0 |
|
[8] |
8 |
8 |
|
[9] |
8 |
8 |
|
[10] |
0 |
8 |
|
[11] |
2 |
2 |
|
[12] |
2 |
2 |
|
[13] |
2 |
2 |
|
[14] |
2 |
2 |
|
[15] |
2 |
2 |
Note:
Status == 1, means pin is OPEN
Status == 2, means pin is shorted to VREFLO
Status == 4, means pin is shorted to VREFHI
Status == 8, means pin is in GOOD/VALID state
Status == 0, means pin with ADC_OSDETECT_STATUS_UNDETERMINED - here I have used 0 instead of 16
