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TMS320F28377D-EP: Firmware update on dual core1&2 using CAN communication and Booting process

Jaeyoung Choi
Prodigy 10 points
Part Number: TMS320F28377D-EP
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Using only core1 from F28377D, we developed non-sys/bios SW before. From CCS and hex convertor, we changed .out file to .hex file. And then, we did SW(Firmware) update through GUI in PC. Our PC and the board were connected by CAN protocol.

Now, we are planning to use F28377D`s dual core1&core2 both for operating different funtion. I heard core1&2 have Master/Slave relation.

1. Compared to only core1 SW update, how can we update core1&2 SW?

2. How can we implement core1&2 booting?(booting process)

Best Regards,

Jaeyoung

  • 0
    TI__Intellectual 1705 points

    Hi Jaeyoung,

    Jaeyoung Choi said:
    Compared to only core1 SW update, how can we update core1&2 SW?

    I recommend referencing the SCI kernel example in C2000Ware for a flash based bootloader that upgrades both CPU1 and CPU2 (device_support\f2837xd\examples\dual\F2837xD_sci_flash_kernels). CPU1 can't program CPU2 flash directly, but CPU1 can program its bank and CPU2 can program its bank. However, if you stream everything via CPU1, you can transfer that to CPU2 memory via shared RAM/IPC and let CPU2 handle programming it's bank. This example uses the same SCI module for both CPUs and switches the SCI ownership to CPU2 when needed. 

    You can also check out a simple GPIO toggle example to get started using IPC (device_support\f2837xd\examples\dual\ipc_gpio_toggle).

    Jaeyoung Choi said:
    How can we implement core1&2 booting?(booting process)

    Have you looked at the Technical Reference Manual's ROM Code and Peripheral Booting chapter? This details the boot flow for CPU1 and CPU2 as well as how to configure the device for dual-core booting. 

    Best,

    Matt