Part Number: TMS320F280049C
Tool/software:
I'm reading myself into the CLA instruction set and find conditional move instructions quite handy, especially
MMOV32 MRa, mem32 {, CNDF}
I assume flags are evaluated in the EXE stage and MRa is only written if the condition is true. Regarding the move, there is no problem with the pipeline.
But what happens if mem32 is indirect addressing with post increment (*MAR0[#imm16]++)?
a) is this post increment also conditional or always executed, since the whole instruction is conditional?
b) if conditional, MAR post-increment is written in the D2 phase, so flags would need to be evaluated in the D1 or D2 phase in addition?
Would be nice if one could answer the question and update the documentation regarding this point.
Conditional post increment would allow conditional calculations within MARx, but I fear such MARx calculations are not conditional but always executed.
