Other Parts Discussed in Thread: C2000WARE
Tool/software:
#include "f28x_project.h"
#include "sysctl.h"
//#include "f2838x_epwm.h"
// DEFINIZIONI
#define MYPWM_FREQUENCY 40000
#define MYDEADBAND_VALUE 0.001
#define OSC_FREQ 25000000
uint32_t MYSYSCLK;
uint32_t tbprd;
uint32_t clockDivider;
uint32_t timebaseclk;
//PROTOTIPI
void inizializzapwm1(void);
void inizializzapwm2(void);
// Main
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
//This example function is found in the f2838x_sysctrl.c file.
InitSysCtrl();
// enable PWM1, PWM2
CpuSysRegs.PCLKCR2.bit.EPWM1=1;
CpuSysRegs.PCLKCR2.bit.EPWM2=1;
// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
// These functions are in the f2838x_epwm.c file
InitEPwm1Gpio();
InitEPwm2Gpio();
//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;
//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the f2838x_piectrl.c file.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in f2838x_defaultisr.c.
// This function is found in f2838x_pievect.c.
//
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
inizializzapwm1();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
for(;;)
{
asm (" NOP");
}
}
void inizializzapwm1()
{
//
// Setup TBCLK
//ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0x1;
MYSYSCLK = SysCtl_getClock(OSC_FREQ);
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 2; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = 2;
clockDivider = EPwm1Regs.TBCTL.bit.HSPCLKDIV * EPwm1Regs.TBCTL.bit.CLKDIV;
tbprd = (MYSYSCLK/clockDivider)/(2*MYPWM_FREQUENCY);
EPwm1Regs.TBPRD = tbprd;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.CMPA.bit.CMPA = tbprd/2; // Set compare A value duty 50%
EPwm1Regs.CMPB.bit.CMPB = tbprd/2;
// Set Compare B value duty 50%
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Set PWM1B on event B, up count
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET; // Clear PWM1B on event B, down count
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm1Regs.DBRED.bit.DBRED = 20;
EPwm1Regs.DBFED.bit.DBFED = 20;
}
Dear Texas support,
I am a PhD student at ENEA in Italy, and I would like to create a code that automatically updates the Time Base Period (TBPRD) value to achieve the desired PWM signal frequency for a given frequency. In my code, the Time Base Period changes, but it does not allow me to achieve the desired PWM frequency. I would greatly appreciate your help in understanding where I might be going wrong.
Thank you in advance for your assistance.