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Tool/software:
Dear Experts,
I was trying to synchronize ePWM1 with an external sync(GPIO18) via Xbar and it got synchronized. However, the ADC which had been triggered by ePWM is no more being triggered after Xbar is incorporated. The interesting thing I have observed is that the ADC gets triggered only in tow cases, one when "InputXbarRegs.INPUT5SELECT = 18;" is excluded from the code, and the other with ADCEXTSOC.
Please do the needful.
Here is the code:
#include "F28x_Project.h" extern void InitSysCtrl(void); extern void InitPieCtrl(void); extern void InitPieVectTable(void); interrupt void TimerOvf(void); interrupt void ADCs_EOC(void); void Initialize_GPIO(void); void Custom_Init(void); void timer0_init(void); void PWM1_Init(void); void Init_ADCs(void); void X_bar(void); int b=0; float a=0; void main(void) { InitSysCtrl(); Custom_Init(); PWM1_Init(); Init_ADCs(); DINT; Initialize_GPIO(); InitPieCtrl(); IER = 0x0000; IFR = 0x0000; InitPieCtrl(); InitPieVectTable(); EALLOW; PieCtrlRegs.PIEIER1.bit.INTx1 = 1; //ADC-A1 PieCtrlRegs.PIEIER1.bit.INTx7 = 1; PieCtrlRegs.PIEIER3.bit.INTx1 = 1; PieVectTable.TIMER0_INT = &TimerOvf; PieVectTable.ADCA1_INT = &ADCs_EOC; PieCtrlRegs.PIECTRL.bit.ENPIE= 1; EDIS; IER |= 3; EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM timer0_init(); CpuTimer0Regs.TCR.bit.TSS=0; while(1) { } } void Initialize_GPIO(void) { EALLOW; //GPIO 18 - Xbar input GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0; GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0; GpioCtrlRegs.GPAPUD.bit.GPIO18 = 1; GpioCtrlRegs.GPADIR.bit.GPIO18 = 0; GpioCtrlRegs.GPACSEL3.bit.GPIO18 = 0; GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; InputXbarRegs.INPUT5SELECT = 18; GpioCtrlRegs.GPADIR.bit.GPIO18 = 0; // LED out GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; GpioCtrlRegs.GPADIR.bit.GPIO31 = 1; GpioCtrlRegs.GPCDIR.bit.GPIO73= 1; //PWMs GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; //ePWM1A GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; //ePWM1A GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; //ePWM2A EPwm1Regs.CMPA.bit.CMPA = 1500; EPwm2Regs.CMPA.bit.CMPA = 500; EDIS; } void Custom_Init(void) { EALLOW; ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL=1; ClkCfgRegs.AUXPLLMULT.bit.IMULT=20; ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV=0; ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1; ClkCfgRegs.LOSPCP.bit.LSPCLKDIV = 2; ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0; CpuSysRegs.PCLKCR0.bit.CPUTIMER0 = 1; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; ///source initsysctrl CpuSysRegs.PCLKCR2.bit.EPWM1 = 1; CpuSysRegs.PCLKCR13.bit.ADC_A = 1; CpuSysRegs.PCLKCR0.bit.CLA1 = 1; DevCfgRegs.CPUSEL0.bit.EPWM1 = 0; EDIS; } void timer0_init(void) { EALLOW; CpuTimer0Regs.PRD.bit.MSW = 0x0004; CpuTimer0Regs.PRD.bit.LSW = 0x0080; CpuTimer0Regs.TPR.bit.TDDR = 0x0013; CpuTimer0Regs.TCR.bit.TIE= 1; CpuTimer0Regs.TCR.bit.TSS=1; CpuTimer0Regs.TCR.bit.FREE=0; CpuTimer0Regs.TCR.bit.TRB=0; EDIS; } void TimerOvf(void) { b= b+1; if(b>3) { EPwm1Regs.TBSTS.bit.SYNCI=1; b=1; } if(EPwm1Regs.TBSTS.bit.SYNCI==1) { GpioDataRegs.GPBSET.bit.GPIO34=1; GpioDataRegs.GPASET.bit.GPIO31=1; } CpuTimer0Regs.TCR.bit.TIF = 1; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } void ADCs_EOC(void) { a = AdcaResultRegs.ADCRESULT0; //Va EPwm1Regs.CMPA.bit.CMPA = 10000*a/4095; EPwm2Regs.CMPA.bit.CMPA = 10000*a/4095; EPwm4Regs.CMPA.bit.CMPA = 10000*a/4095; AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } void PWM1_Init(void) { EALLOW; EPwm1Regs.TBCTL.bit.CTRMODE = 0; // Count up EPwm1Regs.TBPRD = 10000; // Set timer period EPwm1Regs.TBCTL.bit.PHSEN = 1; // Enable phase loading EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0 EPwm1Regs.TBCTR = 0x0000; // Clear counter EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT EPwm1Regs.TBCTL.bit.CLKDIV = 0; EPwm1Regs.TBCTL.bit.SYNCOSEL = 0; // Setup shadow register load on ZERO EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0; EPwm1Regs.CMPCTL.bit.SHDWBMODE = 0; EPwm1Regs.CMPCTL.bit.LOADAMODE = 0; EPwm1Regs.CMPCTL.bit.LOADBMODE = 0; // Set Compare values // Set compare A value // Set actions EPwm1Regs.AQCTLA.bit.ZRO = 2; // Set PWM1A on Zero EPwm1Regs.AQCTLA.bit.CAU = 1; // Clear PWM1A on event A, up count //SOCA to ADC EPwm1Regs.ETSEL.bit.SOCAEN=1; EPwm1Regs.ETSEL.bit.SOCASEL=1; EPwm1Regs.ETPS.bit.SOCAPRD = 1; EPwm1Regs.ETCLR.bit.SOCA = 1; EPwm2Regs.TBCTL.bit.CTRMODE = 0; // Count up EPwm2Regs.TBPRD = 8000; // Set timer period EPwm2Regs.TBCTL.bit.PHSEN = 1; // Enable phase loading EPwm2Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0 EPwm2Regs.TBCTR = 0x0000; // Clear counter EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT EPwm2Regs.TBCTL.bit.CLKDIV = 0; EPwm2Regs.TBCTL.bit.SYNCOSEL = 0; // Setup shadow register load on ZERO EPwm2Regs.CMPCTL.bit.SHDWAMODE = 0; EPwm2Regs.CMPCTL.bit.SHDWBMODE = 0; EPwm2Regs.CMPCTL.bit.LOADAMODE = 0; EPwm2Regs.CMPCTL.bit.LOADBMODE = 0; // Set Compare values+ // Set compare A value // Set actions EPwm2Regs.AQCTLA.bit.ZRO = 2; // Set PWM1A on Zero EPwm2Regs.AQCTLA.bit.CAU = 1; // Clear PWM1A on event A, up count EDIS; } void Init_ADCs(void) { EALLOW; AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); AdcSetMode(ADC_ADCC, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1; AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1; AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1; AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1; AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1; AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1; DELAY_US(1000); AdcaRegs.ADCCTL2.bit.PRESCALE = 6; AdcbRegs.ADCCTL2.bit.PRESCALE = 6; AdccRegs.ADCCTL2.bit.PRESCALE = 6; AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0; //SOC0 will convert pin A0 AdcaRegs.ADCSOC1CTL.bit.CHSEL = 1; //SOC1 will convert pin A1 AdcaRegs.ADCSOC2CTL.bit.CHSEL = 2; //SOC2 will convert pin A2 AdcaRegs.ADCSOC3CTL.bit.CHSEL = 3; //SOC3 will convert pin A3 AdcaRegs.ADCSOC4CTL.bit.CHSEL = 4; //SOC4 will convert pin A4 AdcaRegs.ADCSOC5CTL.bit.CHSEL = 5; //SOC5 will convert pin A5 AdcbRegs.ADCSOC0CTL.bit.CHSEL = 2; //SOC0 will convert pin B2 AdcbRegs.ADCSOC1CTL.bit.CHSEL = 3; //SOC1 will convert pin B3 AdcbRegs.ADCSOC2CTL.bit.CHSEL = 4; //SOC2 will convert pin B4 AdcbRegs.ADCSOC3CTL.bit.CHSEL = 5; //SOC3 will convert pin B5 AdccRegs.ADCSOC0CTL.bit.CHSEL = 2; //SOC0 will convert pin C2 AdccRegs.ADCSOC1CTL.bit.CHSEL = 3; //SOC1 will convert pin C3 AdccRegs.ADCSOC2CTL.bit.CHSEL = 4; //SOC2 will convert pin C4 AdccRegs.ADCSOC3CTL.bit.CHSEL = 5; //SOC3 will convert pin C5 AdcaRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC1CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC2CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC3CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC4CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC5CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcbRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcbRegs.ADCSOC1CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcbRegs.ADCSOC2CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcbRegs.ADCSOC3CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdccRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdccRegs.ADCSOC1CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdccRegs.ADCSOC2CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdccRegs.ADCSOC3CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles AdcaRegs.ADCBURSTCTL.bit.BURSTEN = 1; AdcaRegs.ADCBURSTCTL.bit.BURSTSIZE = 11; AdcaRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 05; AdcbRegs.ADCBURSTCTL.bit.BURSTEN = 1; AdcbRegs.ADCBURSTCTL.bit.BURSTSIZE = 11; AdcbRegs.ADCBURSTCTL.bit.BURSTTRIGSEL =05; AdccRegs.ADCBURSTCTL.bit.BURSTEN = 1; AdccRegs.ADCBURSTCTL.bit.BURSTSIZE = 11; AdccRegs.ADCBURSTCTL.bit.BURSTTRIGSEL =05; AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared EDIS; }
Thanks in advance.
Regards,
Rajesh.
Hi Rajesh,
To troubleshoot this issue, I’d start by seeing if the PWM is actually outputting with your current setup. If it’s not, then it makes sense that you wouldn’t see the ADC SoC. Can you take a look at that?
Best Regards,
Masoud
Hi Masoud,
It was a silly mistake I made- I did not enabled the clock to the PWM. It is working now. I am sorry for the late update.
Regards,
Rajesh