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Original question:

TMS320F280039C: SCI Break detect condition

TMS320F280039C: SCI_RXSTATUS_BREAK

Jaehoon Jeong
Prodigy 140 points

Part Number: TMS320F280039C

Tool/software:

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1436954/tms320f280039c-sci-break-detect-condition

 - Previous thread

Dear TI expert,

I found the reason why I can't check SCI_RXSTATUS_BREAK flag in my code.

If I make SCI Break (keep SCI data line low over 82.5us), FE(Framing Error) and PE(Parity Error) bits(sometimes FE & OE & PE bits) are setted faster than BRKDT bit.

That's why DSSI_Break_Flag is not incresed in my code.

    if((SCI_getRxStatus(SCIA_BASE) & SCI_RXSTATUS_BREAK)) // DSSI Break -> Configuration Phase
    {
        DSSI_Break_Flag++;
        SCI_clearInterruptStatus(SCIA_BASE, SCI_INT_RXRDY_BRKDT);
        SCI_performSoftwareReset(SCIA_BASE);
        return;
    }
    else if((SCI_getRxStatus(SCIA_BASE) & (SCI_RXSTATUS_ERROR | SCI_RXSTATUS_PARITY | SCI_RXSTATUS_OVERRUN | SCI_RXSTATUS_FRAMING)))
    {
        SCI_performSoftwareReset(SCIA_BASE);
        SCI_resetChannels(SCIA_BASE);
        return;
    }

Is it normal for the FE&PE&OE error to occur together if I make SCI Break?

If I want to use BRKDT error only in SCI Break, is there any method that I can avoid FE&PE&OE error?

In TI library, there is no function that disable FE, PE and OE error.

Please check and advice,

Thanks.

Best Regards,

From. Jaehoon

  • 0
    Prodigy 140 points

    Can I get an update on this?

  • 0 in reply to Jaehoon Jeong
    TI__Genius 11076 points

    Jaehoon, apologies for the delay in response. I was looking into this issue. The following information is taken from the F28003x TRM chapter on SCI:

    • SCIRXST.FE field description states that FE will be flagged prior to BRKDT in standard use cases. This is known.
    • SCIRXST.RXERROR is a logical OR of the (BRKDT, FE, OE, and PE) error flags. If RX ERR INT ENA bit in SCICTL1 is set, then this bit triggers the interrupt.
    • SCIRXST.BRKDT field description states that when this bit is set, RXRDY is not set, and no further interrupts can be set

    It sounds like in your situation, the SCI ISR is being entered prior to BRKDT bit being set because of the FE error. I'll continue looking into a way to avoid this situation, but so far I haven't found any other similar circumstances.

    However, the device TRM section 25.11.1 Break Detect does give an alternative way to determine a break state, using the FE, PE, and SCIRXBUF.SAR bits. This alternative solution should work for your situation.

    Regards,
    Jason Osborn