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TMS320F280039C: SCI Break detect condition

Part Number: TMS320F280039C
Other Parts Discussed in Thread: C2000WARE

Tool/software:

I asked how to make SCI break last time and TI expert told me that I can make SCI break with GPIO control.

In data sheet : SCI is low for 9.625 bit following a missing stop bit. (Start 1bit + data 8bit + Parity 1bit + Stop 1bit + 9.625bit = 20.625bit low (82.5us at 250,000 baudrate)

Following above calculation, I made SCI low condition about 82.5us but SCI_RXSTATUS_BREAK is rarely setted.

I tested total 104 times between 77.96us and 85.05us, but SCI break occur only once. (SCI break occured at 84.968us low but SCI break didn't occur at another same 84.968us)

Could you advice me specific time or condition for making SCI break?

  • Hi Jaehoon,

    Can you provide the snippet of code in which you are directly manipulating the pinmux to be an output and driving that through the GPIO module? Some scope screenshots verifying that the SCI pin is low would also be of assistance. Can you try to externally drive the SCI pin low for this amount of time and seeing how this impacts the BREAK DETECt flag in the SCI registers?

    Best regards,

    Delaney

  • MCU 1 : Make SCI line low by GPIO control

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    GPIO_setPinConfig(GPIO_16_GPIO16); // Change Pin configuration for GPIO control
    GPIO_writePin(SCITXDA_GPIO, 0); // Make the SCI line to low
    DEVICE_DELAY_US(50); // Keep low the SCI line
    GPIO_setPinConfig(GPIO_16_SCIA_TX); // Release the SCI line
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    MCU 2 : Tracking SCI Break and Count up "DSSI_Break_Flag" variable

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    __interrupt void sciaRxISR(void)
    {
    IER = INTERRUPT_CPU_INT3; // EPWM 1,2
    EINT;
    Function_DSSI_Rx();
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
    }
    #pragma FUNC_ALWAYS_INLINE(Function_DSSI_Rx)
    static inline void Function_DSSI_Rx(void)
    {
    unsigned char i, Count_Unsupported_CMD;
    uint16_t DSSI_Received;
    if((SCI_getRxStatus(SCIA_BASE) & SCI_RXSTATUS_BREAK)) // DSSI Break -> Configuration Phase
    {
    DSSI_Break_Flag++;
    Reply_OK();
    DSSI_Packet_Index = 0;
    SCI_clearInterruptStatus(SCIA_BASE, SCI_INT_RXRDY_BRKDT);
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Below is waveform that MCU 1 controlled SCI line.

    I also used external switch but it is hard to make under 100us delay. (Minimum SCI low time is around 50ms when I used external switch)

  • Hi Jaehoon,

    The calculations and configurations you have here look correct. Another possibility could be that baud rate error is interfering with the timing - what LSPCLK setting are you using?

    Your interrupt nesting may also be playing a factor - can you try isolating just the SCI RX interrupt (remove nesting and other interrupts) to see if you now receive the break detect interrupts? Also note that you are missing some of the recommended code for nesting interrupts, see the interrupt nesting guide linked here.

    Best Regards,

    Delaney

  • Hi Delaney,

    DEVICE_LSPCLK_FREQ is 30MHz.

    Also I will test following your advice, but How I do if nesting blocks the setting of SCI break?

    Nesting shouldn't be delete in actual operation.

  • Hi Jaehoon,

    At an LSPCLK of 30MHz and baud rate of 250,000 bps there should be a 0% error, so that shouldn't be the issue.

    Nesting of interrupts can sometimes cause blocking of a specific ISR, or cause missed interrupts. Since you are allowing for other interrupts to interrupt the SCI RX ISR before the actual functionality is executed, it could be that the code below in the ISR is never reached. In order to isolate this can you comment out everything except the: Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9); line inside the ISR? 

    Also, which other interrupts do you have enabled in your application?

    Best Regards,

    Delaney

  • Hi Delaney,

    Sorry for delay, I had a business trip in Taiwan.

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    __interrupt void sciaRxISR(void)
    {
    if((SCI_getRxStatus(SCIA_BASE) & SCI_RXSTATUS_BREAK)) // DSSI Break -> Configuration Phase
    {
    DSSI_Break_Flag++;
    SCI_clearInterruptStatus(SCIA_BASE, SCI_INT_RXRDY_BRKDT);
    SCI_performSoftwareReset(SCIA_BASE);
    }
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
    }
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    I changed code like above, but SCI_RXSTATUS_BREAK flag is rarely setted like before.

    --------------------------------------------------------------------------------------------------------------------

    Interrupt_enable(INT_PMBUSA);

    Interrupt_enable(INT_SCIB_RX);

    Interrupt_enable(INT_SCIB_TX);

    Interrupt_enable(INT_SCIA_RX);

    Interrupt_enable(INT_SCIA_TX);

    Interrupt_enable(INT_myECAP0);

    Interrupt_enable(INT_XINT1);

    Interrupt_enable(TTPLPFC_C28x_INSTRUMENTATION_INTERRUPT_TIMER0);

    Interrupt_enable(TTPLPFC_C28x_INSTRUMENTATION_INTERRUPT_TIMER1);

    Interrupt_enable(PSFB_FB_PWM1_INT);

    Interrupt_enable(PSFB_C28x_CONTROLISR_INTERRUPT);

    Interrupt_enable(INT_I2CA_FIFO);

    Interrupt_enable(INT_I2CA);

    --------------------------------------------------------------------------------------------------------------------

    Above is all of interrupt in my code.

    I think it is not acceptable that interrupt is not occur due to other interrupt.

    Interrupt can be execute with delay due to other interrupt, but it doesn't make sense that interrupt didn't execute due to other interrupt.

    As you know C2000 series is for power control, so interrupt nesting for power control is inevitable.

    Please give me more fundamental advice.

  • Hi Jaehoon,

    I see, if done carefully you should not have any loss of interrupts. Please see the document linked here and match your interrupt code to this to verify that nesting is happening correctly. We also have some example masking files you can use, shown in the interrupt software prioritization example in [C2000ware install]/driverlib/f28003x/examples/interrupt/interrupt_ex3_sw_prioritization. Can you specify the priority order you are looking to use, and I can provide some guidance on the software implementation?

    Also, a good way to rule out the nesting as an issue would be to test the application with all other interrupts disabled other than the SCI A receive interrupt.

    Best Regards,

    Delaney