TMS320F28379D: Illegal ISR upon RESET

Hi Rajesh,

I am looping in the NMI expert to take a look at your question.

Best Regards,

Delaney

Hi Delaney,

I have another problem related to CLA, if you don't mind, please look into this tread.

TMS320F28379D: CLA does not get triggered - C2000 microcontrollers forum - C2000︎ microcontrollers - TI E2E support forums

Regards,

Rajesh.

Hi Rajesh,

Can you step through the code and narrow down to where the ITRAP is getting triggered ?

Are you sure the device is getting reset ? Do you know if its because of ITRAP ?

Thanks

Hi Prathan,

Yes, the Device enters the Illegal Subroutine upon reset(pressing the launchpad pushbutton).

I am not sure about if it is the ITRAP that is making the computer to enter ILLEGAL ISR. All I can see is, when the RESET is pressed, the CPU directs to the address 0x082064 which corresponds to the ILLEGAL_ISR and the debug mode comes out of RUN mod. when the RUN is pressed, the cCPU runs with no PWM and ADC running!

Regards,

Rajesh.

Hi Rajesh,

What are you trying to achieve ?

If you objective is to trigger Xrsn (device reset) and start running application, then please check if the application is programmed in flash and the boot modes is set to flash boot mode. Boot mode can be set to flash boot mode using the boot mode pins, please check the reference manual for more details.

Thanks

Hi Prarthan,

I think there is some confusion here.

In the original post of this thread, I mentioned the objective is to copy a section of program(ADC ISR) in the RAM from FLASH to achieve better latency.

The BOOT MODE pins are configured to the default position that came with the manufacturer and I think its at the position corresponding to the FLASH;

As mentioned earlier, It would run without a glitch when the ISR wasn’t copied to RAM( omitting “# pragma CODE SECTION( ramsfunc)” line)

I hope I explained the objective in a better way. I shared the project in the original post for your reference.

Regards,

Rajesh.

Hi Rajesh,

Please refer to the note - https://www.ti.com/lit/an/spra958l/spra958l.pdf

I don't see the runtime copy of ADC ISR from Flash to RAM. Can you refer to the app note above and add the memcpy function for the same.

Thanks

Dear Prarthan,

The "#define _FLASH" is defined in the top of the program that enables the Flash related initialization is incorporated when InitSysCtrl() is called. Anyways, I have also tried running with memcpy as per your suggestion. Still, I dont see any improvement.

Regards,

Rajesh.

HI

I just replaced the line #pragma CODE_SECTION(ADCs_EOC, "ramfuncs") with #pragma CODE_SECTION(ADCs_EOC, ".TI.ramfunc") and its working fine now.

However, I see several ITRAP0 lines in the  LS0RAM, where  ADCs_ISR  is copied. 

Here is the disassembly code:

Here is the main.c

#include "F28x_Project.h"
#include <math.h>
#include <stdio.h>

#define _FLASH

extern void InitSysCtrl(void);
extern void InitPieCtrl(void);
extern void InitPieVectTable(void);
extern void InitFlash(void);
extern void SeizeFlashPump(void);
extern unsigned int  RamfuncsLoadStart;
extern unsigned int  RamfuncsLoadEnd;
extern unsigned int  RamfuncsRunStart;

#define TWO_PI 6.283185307179586476925286766559



interrupt void ADCs_EOC(void);
interrupt void TimerOvf(void);

void Initialize_GPIO(void);
void Custom_Init(void);

void PWM1_Init(void);
void Init_ADCs(void);
void X_bar(void);
void timer0_init(void);

int buff[100],i,b,c,d=0;
float pi,V_alpha,V_beta,Vd,Vq,R,Y,B,temp,temp2,theta,a;


void main(void)
{

   InitSysCtrl();
   Custom_Init();
   PWM1_Init();
   Init_ADCs();
   DINT;
   Initialize_GPIO();
   InitPieCtrl();
   timer0_init();

 //  memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, &RamfuncsLoadEnd - &RamfuncsLoadStart);

   memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);


   IER = 0x0000;
   IFR = 0x0000;
   InitPieCtrl();
   InitPieVectTable();

   EALLOW;
   PieCtrlRegs.PIEIER1.bit.INTx1 = 1;    //ADC-A1
   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;

   PieVectTable.ADCA1_INT = &ADCs_EOC;
   PieVectTable.TIMER0_INT = &TimerOvf;

   PieCtrlRegs.PIECTRL.bit.ENPIE= 1;
   EDIS;

   IER |= 1;
   EINT;  // Enable Global interrupt INTM
   ERTM;  // Enable Global realtime interrupt DBGM
   CpuTimer0Regs.TCR.bit.TSS=0;
   while(1)
       {

        }
}
void Initialize_GPIO(void)
{
    EALLOW;
    //GPIO 18 - Xbar input
 /*       GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0;
    //    GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0;
    //    GpioCtrlRegs.GPAPUD.bit.GPIO18 = 1;
   //     GpioCtrlRegs.GPADIR.bit.GPIO18 = 0;
   //     GpioCtrlRegs.GPACSEL3.bit.GPIO18 = 0;
   //     GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3;
        InputXbarRegs.INPUT5SELECT = 18;

*/
    // LED out
        GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;
        GpioCtrlRegs.GPADIR.bit.GPIO31 = 1;
        GpioCtrlRegs.GPCDIR.bit.GPIO73= 1;


   //PWMs
        GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; //ePWM1A
        GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; //ePWM2A
        GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; //ePWM3A
        GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1; //ePWM4A
        GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1; //ePWM5A
        GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; //ePWM6A

    EDIS;

}
void Custom_Init(void)
{
    EALLOW;
    ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL=1;
    ClkCfgRegs.AUXPLLMULT.bit.IMULT=20;
    ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV=0;
    ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1;
    ClkCfgRegs.LOSPCP.bit.LSPCLKDIV = 2;
    ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0;
    CpuSysRegs.PCLKCR0.bit.CPUTIMER0 = 1;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;   ///source initsysctrl
    CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM2 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM3 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM4 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM5 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM6 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM7 = 1;

    CpuSysRegs.PCLKCR13.bit.ADC_A = 1;
    CpuSysRegs.PCLKCR0.bit.CLA1 = 1;
    DevCfgRegs.CPUSEL0.bit.EPWM1 = 0;

    Flash0CtrlRegs.FPAC1.bit.PMPPWR = 1;  // Enable flash pump
    Flash0CtrlRegs.FRDCNTL.bit.RWAIT = 3; // Adjust wait states
    EDIS;
}

void timer0_init(void)
{
    EALLOW;
    CpuTimer0Regs.PRD.bit.MSW = 0x0004;
    CpuTimer0Regs.PRD.bit.LSW = 0x0080;
    CpuTimer0Regs.TPR.bit.TDDR = 0x0013;


    CpuTimer0Regs.TCR.bit.TIE= 1;
    CpuTimer0Regs.TCR.bit.TSS=1;
    CpuTimer0Regs.TCR.bit.FREE=0;
    CpuTimer0Regs.TCR.bit.TRB=0;
    EDIS;
}

void TimerOvf(void)
{
    b= b+1;

    if(b>10)
    {
        b=1;
    }
    GpioDataRegs.GPBTOGGLE.bit.GPIO34=1;
    GpioDataRegs.GPATOGGLE.bit.GPIO31=1;
    CpuTimer0Regs.TCR.bit.TIF = 1;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

#pragma CODE_SECTION(ADCs_EOC, ".TI.ramfunc")

void ADCs_EOC(void)
{
    Vd=100;
    Vq=0;
    c =c +1;
    if(c>3)
    {
        c=0;
    }

    a = AdcaResultRegs.ADCRESULT0; //Va

    temp = (a*62500)/4095;

    R = 1000-a;

    EPwm1Regs.CMPA.bit.CMPA = temp;
    EPwm1Regs.CMPB.bit.CMPB = temp + 9000;

    i= i+1;

    EPwm1Regs.ETCLR.bit.SOCA = 1;
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}



void PWM1_Init(void)
{
          EALLOW;
          //R Phase
          EPwm1Regs.TBCTL.bit.CTRMODE = 0;             // Count up
          EPwm1Regs.TBPRD = 62500;                    // Set timer period
          EPwm1Regs.TBCTL.bit.PHSEN = 0;               // 1 for external SYNC
          EPwm1Regs.TBPHS.bit.TBPHS = 0x0000;          // Phase is 0
          EPwm1Regs.TBCTR = 0x0000;                    // Clear counter
          EPwm1Regs.TBCTL.bit.HSPCLKDIV = 2;           // Clock ratio to SYSCLKOUT
          EPwm1Regs.TBCTL.bit.CLKDIV = 4;
          EPwm1Regs.TBCTL.bit.SYNCOSEL = 1;
          // Setup shadow register load on ZERO
          EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;
          EPwm1Regs.CMPCTL.bit.SHDWBMODE = 0;
          EPwm1Regs.CMPCTL.bit.LOADAMODE = 0;
          EPwm1Regs.CMPCTL.bit.LOADBMODE = 0;
          // Set Compare values
                // Set compare A value
          // Set actions
          EPwm1Regs.AQCTLA.all = 0;
          EPwm1Regs.AQCTLA.bit.CAU = 2;                // Set PWM1A on TBCTR = CMPA
          EPwm1Regs.AQCTLA.bit.CBU = 1;                // Clear PWM1A on TBCTR = CMPB= CMPA + 100


          //SOCA to ADC
          EPwm1Regs.ETSEL.bit.SOCAEN=1;
          EPwm1Regs.ETSEL.bit.SOCASEL=1;
          EPwm1Regs.ETPS.bit.SOCAPRD = 1;
          EPwm1Regs.ETCLR.bit.SOCA = 1;

          EDIS;
}

void Init_ADCs(void)
{
    EALLOW;

            AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
            AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
            AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;

            AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
            AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
            AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
   //         DELAY_US(1);

            AdcaRegs.ADCCTL2.bit.PRESCALE = 6;
            AdcbRegs.ADCCTL2.bit.PRESCALE = 6;
            AdccRegs.ADCCTL2.bit.PRESCALE = 6;

            AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0;  //SOC0 will convert pin A0
            AdcaRegs.ADCSOC1CTL.bit.CHSEL = 1;  //SOC1 will convert pin A1
            AdcaRegs.ADCSOC2CTL.bit.CHSEL = 2;  //SOC2 will convert pin A2
            AdcaRegs.ADCSOC3CTL.bit.CHSEL = 3;  //SOC3 will convert pin A3
            AdcaRegs.ADCSOC4CTL.bit.CHSEL = 4;  //SOC4 will convert pin A4
            AdcaRegs.ADCSOC5CTL.bit.CHSEL = 5;  //SOC5 will convert pin A5


            AdcaRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles
            AdcaRegs.ADCSOC1CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles
            AdcaRegs.ADCSOC2CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles
            AdcaRegs.ADCSOC3CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles
            AdcaRegs.ADCSOC4CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles
            AdcaRegs.ADCSOC5CTL.bit.ACQPS = 14; //sample window is 100 SYSCLK cycles


            AdcaRegs.ADCBURSTCTL.bit.BURSTEN = 1;
            AdcaRegs.ADCBURSTCTL.bit.BURSTSIZE = 11;
            AdcaRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 5;



            //interrupt
            AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
            AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;   //enable INT1 flag
            AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
            AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0;
            AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 05;

    EDIS;
}

So, are ITRAP0 lines to have in the program normal?

Regards,

Rajesh.

No these are not normal.

rajesh beesetty said:

ITRAP0 lines to have in the program normal

I tried to run your project with the latest main() and it working fine.

No issues in disassembly code even after reset.

Thanks