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TMS320F280049C: Using DMA for SPI data transfer between SPIA and SPIB without data processing

Thao Truong
Prodigy 81 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hello everyone

I’m working on a project where I need to read data from an external peripheral via SPIA (controller mode) and directly forward this data (without any processing) to another peripheral via SPIB (controller mode). The data size varies between 100 and 19000 bytes.

I’m wondering if it is possible to achieve this data transfer using DMA, in order to ensure an efficient and fast transfer. The goal is for the data to be received from SPIA and sent to SPIB without delays or manual processing.

Has anyone had experience with a similar implementation and can offer tips on configuring DMA for this type of data transfer? Are there any other considerations I should take into account to ensure smooth and efficient transmission?

I look forward to your suggestions and experiences.

Thank you in advance.

Best regards,

Thao Truong

  • 0
    TI__Mastermind 21080 points

    Hi Thao,

    Yes, this should be possible using the DMA module. A good example to follow would be the spi_ex5_loopback_dma example in C2000ware (path: [C2000ware path]/driverlib/f28004x/examples/spi/. We also have a TRM section that details how to best configure the SPI with the DMA (linked here). According to your description, I believe you want to use a DMA channel that has a source address of the SPIA RX DATA register, and the destination address of the SPIB TX DATA register.

    The most important thing to remember when using SPI with DMA is that the DMA burst size always needs to match the SPI FIFO level. If your packet size is varying, I would suggest using the highest FIFO level that divides evenly into every possible packet size (which I believe in your case would be 2).

    Best Regards,

    Delaney

  • 0
    Prodigy 81 points

    Hi Delaney,

    Thank you for your response. 

    I will try the example in C2000ware.

    Furthermore, does raising TXFFIL/RXFFIL improve the speed of the data transfer?

    For example:

    NUM_WORDS = 200

    RXFFIL = 4

    DMA_TRANSFER_SIZE = (NUM_WORDS / RXFFIL) – 1 = (200 / 4) – 1 = 49 (50 transfers)

    DMA_BURST_SIZE = RXFFIL – 1 = 3 (4 words per burst)

    When will the DMA-TX and DMA-RX interrupts occur? After transmitting all 200 words?

    Thank you.

    Best regards,

    Thao

  • +1 in reply to Thao Truong
    TI__Mastermind 21080 points

    Hi Thao,

    The TXFFIL/RXFFIL is the FIFO level I mentioned before. Having a larger FIFO level won't necessarily increase the rate of data transfer (if you are talking about DMA transfer rate) but rather will allow you to temporarily store more data at a time to be transmitted/received via SPI. Due to this, using a higher FIFO level will allow you to use an increased SPI baud rate without losing data (without overwriting the FIFO as quickly).

    A DMA interrupt can be configured to trigger either at the start of a transfer or at the end of a transfer. In this example case from the TRM, if the end of transfer DMA interrupt was configured, then yes, the DMATX interrupt would trigger after 200 words have been transferred to the TX buffer (and then transmitted) and the DMARX interrupt would trigger after 200 words have been received and transferred.

    Best Regards,

    Delaney