Other Parts Discussed in Thread: SYSCONFIG, C2000WARE
Tool/software:
Hi,
I found out that by default the EPWMCLKDIV in the clock tree of sysconfig for TMS320F28P650DK is set to "divide by 2", so knowing that the SYSCLK is 200MHz the EPWMCLK is 200MHz/2 = 100MHz.
Initially I left the settings unchanged in running the EPWM lab training from C2000ware. So the formulas for Time Base Period (TBPRD) and Counter Compare Value (CCV) are set in the following way as in the example at this link https://dev.ti.com/tirex/explore/node?node=A__ASXXwGbQ.ubt5o3S3jXEvA__C28X-ACADEMY__1sbHxUB__LATEST :
TBCLK = (SYSCLK/2)/(CLKDIV*HSPCLKDIV) = (100e6)/(1*1) = 100e6
TBPRD = TBCLK/(2 * f_PWM) = (100e6)/(2*2000) = 25000
CCV = (1 - duty/100)*TBPRD = (1 -25/100)*25000 = 18750
With these values in the sysconfig EPWM section I got the same results as in the example: a PWM signal at 2kHz with 25% duty cycle.
If I set EPWMCLKDIV to 1, then EPWMCLK is 200MHz/1 = 200MHz, now for obtaining the same results I should set either CLKDIV or HSPCLKDIV to 2. Setting CLKDIV to 2, then the formulas becomes:
TBCLK = (SYSCLK/1)/(CLKDIV*HSPCLKDIV) = (200e6)/(2*1) = 100e6
TBPRD = TBCLK/(2 * f_PWM) = (100e6)/(2*2000) = 25000
CCV = (1 - duty/100)*TBPRD = (1 -25/100)*25000 = 18750.
So no change in the TBPRD and CC values, and I expect to have the same results as before. However, what I can see from the oscilloscope is a PWM signal at 1kHz with 25% duty cycle. In practice it seems that setting the EPWMCLKDIV to 1 has no effect on the EPWMCLK.
I tried to add "device support" in sysconfig but it gives error in building. Then, if I exclude from building the device folder, it builds but nothing goes to the control card (I cannot see any signal on the oscilloscope).
Do you know how to properly set the EPWMCLK to 200MHz in a way that it is effectively of that frequency?
Thank you in advance.
Alessandro
