TMS320F28P650DK: How to estimate the overall error of ADC

Akira Sugimoto

Tool/software:

Hello team,

I would like to compare the ADC characteristics against the Renesas RH850/F1KM. How can the overall error be calculated?

The datasheet of RH850 indicates the overall error of ADC like the following image. (The datasheet indicates integral nonlinearity error, differential nonlinearity error, zero scale error and full scale error as well.)

In the datasheet of TMS320F28P65x, the overall error is not stated and only individual errors are stated.

According to the thread below, it can estimated by RSS with INL error, offset error, and gain error. In our scenario, the values obtained from each ADC channel of the microcontroller are used individually.

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/245764/adc-total-error

Some errors in the datasheets indicates typical error range and max/min error value. For instance, the gain error with internal reference in 12-bit is ±45LSB, the gain error with external reference in 16-bit is ±64LSB. The error margin seems rather large, but how to combine them? Could its performance be inferior to that of RH850 under specific conditions?

Best Regards,

Akira

over 1 year ago

0 Nilesh Khanna over 1 year ago

TI__Intellectual 2270 points

Hi Akira,

Thanks for posting this query.

Couple of comments on the Gain error comparison.

It seems the RH850 doesn't support Internal reference, it only support the External ref mode
Gain error spec to be taken should be ±5 LSB on 12B level
On 16B level 64 LSB would be (64/65536*2.5V[VREF]) = ~2mV

I will get back on the TOE number.

BR,

Nilesh

0 Akira Sugimoto over 1 year ago in reply to Nilesh Khanna

Prodigy 90 points

Hi Nilesh,

Thank you for your information. Looking forward to your update.

Best Regards,

Akira

0 Nilesh Khanna 11 months ago in reply to Akira Sugimoto

TI__Intellectual 2270 points

Hi Akira,

Please find the below table for calculated TOE for External ref mode.

Device	TOE	Gain or FSE	offset	INL	Calculated TOE
RH850/F1KH	6	5.5	5.5	3	8.336666	Calculated TOE is a pessimistic no for both devices
F28p65x	-	5	5	2	7.348469228	Calculated TOE is a pessimistic no for both devices

If we look at the calculated TOE for both devices the no's are pessimistic as it is considering the worst case no's (Voltage and temp) but actual error might be lower. As for RH850 device has a difference of ~2LSB compared to actual vs calculated. We can expect the error to be < +/-7LSB

BR,

Nilesh

0 Akira Sugimoto 11 months ago in reply to Nilesh Khanna

Prodigy 90 points

Hello Nilesh,

Thank you very much for the information.

In this context, does “TOE” refer to the total measured error? How does the calculated TOE differ from the actual TOE? If you are able to provide an answer, kindly let me know.
If I understand correctly, DNL error is included in the calculation of INL error. Is that correct?

Best Regards,

Akira

0 Nilesh Khanna 11 months ago in reply to Akira Sugimoto

TI__Intellectual 2270 points

Hello Akira,

TOE --> Total output error , (Can be termed as total measured error)

TOE calculated is TUE refere to the Link for more clarity.

I have compared both devices based on above.

Akira Sugimoto said:
If I understand correctly, DNL error is included in the calculation of INL error. Is that correct?

That is correct INL is covered by DNL itself.

BR,

Nilesh

0 Nilesh Khanna 11 months ago in reply to Nilesh Khanna

TI__Intellectual 2270 points

Correction DNL is inherently considered in INL data

Nilesh Khanna said:
That is correct INL is covered by DNL itself.

0 Akira Sugimoto 11 months ago in reply to Nilesh Khanna

Prodigy 90 points

Hello Nilesh,

Thank you for taking the time to answer all my questions in such detail. That was very helpful.

If I may, I have one more question. When using ADC in differential mode, should channel-to-channel errors be considered?

Best Regards,

Akira

0 Nilesh Khanna 11 months ago in reply to Akira Sugimoto

TI__Intellectual 2270 points

Hi Akira,

When considering differential mode the channel to channel error is b/w the differential pairs of ADC.

eg: A0-A1 vs A2-A3 so on so forth for all ADC channel combinations.

BR,

Nilesh

0 Akira Sugimoto 11 months ago in reply to Nilesh Khanna

Prodigy 90 points

Hi Nilesh,

Thank you very much for your response.
I understand that the error to be taken into account is the one between each pair of differential channels within the same ADC module.

Best Regards,

Akira

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TMS320F28P650DK: How to estimate the overall error of ADC