TMS320F280033: Large code : can load code but can't debug nor run

Adrien Thurin

Tool/software:

Hi,

Following this question, answered by Marlyn Rosales Castaneda20 (thanks again !), I have been able to load in flash some hardware test code, and run it fine.

However, when I migrated my eval board (F280039C) code application code to the actual application board, the code didn't fit with the new .cmd file. So I tried to concatenate some memory sections, in order to make it fit. In the end, it all fits, the linker is happy. I launch the debug session, press play ... and the core halts. Nothing happens, it is just always halted. I thought it might be a debug issue, so I reset the target, and tried to discuss with it on the CAN bus, but no message in or out. Which makes me think the code is loaded but not running.

Here is the original cmd file provided by Marlyn Rosales Castaneda20

MEMORY
{
   //BEGIN            : origin = 0x00080000, length = 0x00000002
   BEGIN : origin = 0x088000, length = 0x000002
   BOOT_RSVD        : origin = 0x00000002, length = 0x00000126

   RAMM0            : origin = 0x00000128, length = 0x000002D8
   RAMM1            : origin = 0x00000400, length = 0x000003F8
   // RAMM1_RSVD       : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMLS0           : origin = 0x00008000, length = 0x00000800
   RAMLS1           : origin = 0x00008800, length = 0x00000800
   RAMLS2           : origin = 0x00009000, length = 0x00000800
   RAMLS3           : origin = 0x00009800, length = 0x00000800
   RAMLS4           : origin = 0x0000A000, length = 0x00000800
   RAMLS5           : origin = 0x0000A800, length = 0x00000800
   RAMLS6           : origin = 0x0000B000, length = 0x00000800
   RAMLS7           : origin = 0x0000B800, length = 0x00000800

   RAMGS0           : origin = 0x0000C000, length = 0x00001000
   RAMGS1           : origin = 0x0000D000, length = 0x00001000
   RAMGS2           : origin = 0x0000E000, length = 0x00001000
   RAMGS3           : origin = 0x0000F000, length = 0x00000FF8
   // RAMGS3_RSVD      : origin = 0x0000FFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   BOOTROM          : origin = 0x003F8000, length = 0x00007FC0
   SECURE_ROM       : origin = 0x003F2000, length = 0x00006000

   RESET            : origin = 0x003FFFC0, length = 0x00000002

   /* Flash sectors */
   /* BANK 0 */
   //FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE
   //FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000
   //FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000
   //FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000
   //FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000
   //FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000
   //FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000
   //FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000
   
   
   //FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000
   FLASH_BANK0_SEC8 : origin = 0x088002, length = 0x000FFE
   FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000
   FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000
   FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000
   FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000
   FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000

   /* BANK 1 */
   FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000
   FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000
   FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000
   FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000
   FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000
   FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000
   FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000
   FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000
   //FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000
   //FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000
   //FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000
   //FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000
   //FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000
   //FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000
   //FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000
   //FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000

  /* BANK 2 */
   //FLASH_BANK2_SEC0  : origin = 0x0A0000, length = 0x001000
   //FLASH_BANK2_SEC1  : origin = 0x0A1000, length = 0x001000
   //FLASH_BANK2_SEC2  : origin = 0x0A2000, length = 0x001000
   //FLASH_BANK2_SEC3  : origin = 0x0A3000, length = 0x001000
   //FLASH_BANK2_SEC4  : origin = 0x0A4000, length = 0x001000
   //FLASH_BANK2_SEC5  : origin = 0x0A5000, length = 0x001000
   //FLASH_BANK2_SEC6  : origin = 0x0A6000, length = 0x001000
   //FLASH_BANK2_SEC7  : origin = 0x0A7000, length = 0x001000
   //FLASH_BANK2_SEC8  : origin = 0x0A8000, length = 0x001000
   //FLASH_BANK2_SEC9  : origin = 0x0A9000, length = 0x001000
   //FLASH_BANK2_SEC10 : origin = 0x0AA000, length = 0x001000
   //FLASH_BANK2_SEC11 : origin = 0x0AB000, length = 0x001000
   //FLASH_BANK2_SEC12 : origin = 0x0AC000, length = 0x001000
   //FLASH_BANK2_SEC13 : origin = 0x0AD000, length = 0x001000
   //FLASH_BANK2_SEC14 : origin = 0x0AE000, length = 0x001000
   //FLASH_BANK2_SEC15 : origin = 0x0AF000, length = 0x000FF0

// FLASH_BANK0_SEC15_RSVD     : origin = 0x0AFFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

}


SECTIONS
{
   codestart        : > BEGIN, ALIGN(8)
   .text            : >> FLASH_BANK1_SEC2 | FLASH_BANK1_SEC3 | FLASH_BANK1_SEC4,   ALIGN(8)
   .cinit           : > FLASH_BANK1_SEC1,  ALIGN(8)
   .switch          : > FLASH_BANK1_SEC1,  ALIGN(8)
   .reset           : > RESET,                  TYPE = DSECT /* not used, */

   .stack           : > RAMM1

#if defined(__TI_EABI__)
   .init_array      : > FLASH_BANK1_SEC1,  ALIGN(8)
   .bss             : > RAMLS5
   .bss:output      : > RAMLS3
   .bss:cio         : > RAMLS0
   .data            : > RAMLS5
   .sysmem          : > RAMLS5
   .const           : > FLASH_BANK1_SEC4,  ALIGN(8)
#else
   .pinit           : > FLASH_BANK1_SEC1,  ALIGN(8)
   .ebss            : > RAMLS5
   .esysmem         : > RAMLS5
   .cio             : > RAMLS0
   .econst          : > FLASH_BANK1_SEC4,  ALIGN(8)
#endif

    ramgs0 : > RAMGS0
    ramgs1 : > RAMGS0

    /*  Allocate IQ math areas: */
   IQmath           : > FLASH_BANK1_SEC1, ALIGN(8)
   IQmathTables     : > FLASH_BANK1_SEC2, ALIGN(8)

   .TI.ramfunc      : LOAD = FLASH_BANK1_SEC1,
                      RUN = RAMLS0,
                      LOAD_START(RamfuncsLoadStart),
                      LOAD_SIZE(RamfuncsLoadSize),
                      LOAD_END(RamfuncsLoadEnd),
                      RUN_START(RamfuncsRunStart),
                      RUN_SIZE(RamfuncsRunSize),
                      RUN_END(RamfuncsRunEnd),
                      ALIGN(8)

}

Here is my modified cmd file

MEMORY
{
   //BEGIN            : origin = 0x00080000, length = 0x00000002
   BEGIN : origin = 0x088000, length = 0x000002
   BOOT_RSVD        : origin = 0x00000002, length = 0x00000126

   RAMM0            : origin = 0x00000128, length = 0x000002D8
   RAMM1            : origin = 0x00000400, length = 0x000003F8
   // RAMM1_RSVD       : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   //RAMM0_M1	    : origin = 0x00000128, length = 0x000002D8+0x000003F8

   RAMLS0           : origin = 0x00008000, length = 0x00000800
   RAMLS1           : origin = 0x00008800, length = 0x00000800
   RAMLS2           : origin = 0x00009000, length = 0x00000800
   RAMLS3           : origin = 0x00009800, length = 0x00000800
   RAMLS4           : origin = 0x0000A000, length = 0x00000800
   //RAMLS5           : origin = 0x0000A800, length = 0x00000800
   //RAMLS6           : origin = 0x0000B000, length = 0x00000800
   RAMLS5_7         : origin = 0x0000A800, length = 0x00000800 * 3
   //RAMLS7           : origin = 0x0000B800, length = 0x00000800

   RAMGS0           : origin = 0x0000C000, length = 0x00001000
   RAMGS1           : origin = 0x0000D000, length = 0x00001000
   RAMGS2           : origin = 0x0000E000, length = 0x00001000
   RAMGS3           : origin = 0x0000F000, length = 0x00000FF8
   // RAMGS3_RSVD      : origin = 0x0000FFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   BOOTROM          : origin = 0x003F8000, length = 0x00007FC0
   SECURE_ROM       : origin = 0x003F2000, length = 0x00006000

   RESET            : origin = 0x003FFFC0, length = 0x00000002

   /* Flash sectors */
   /* BANK 0 */
   //FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE
   //FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000
   //FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000
   //FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000
   //FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000
   //FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000
   //FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000
   //FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000
   
   
   //FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000
   FLASH_BANK0_SEC8 : origin = 0x088002, length = 0x000FFE
   FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000
   FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000
   FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000
   FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000
   FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000

   /* BANK 1 */
   FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000
   FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000
   FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000
   FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000
   //FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000
   //FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000
   FLASH_BANK1_SEC4_5  : origin = 0x094000, length = 0x001000 * 2
   FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000
   FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000
   //FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000
   //FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000
   //FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000
   //FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000
   //FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000
   //FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000
   //FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000
   //FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000

  /* BANK 2 */
   //FLASH_BANK2_SEC0  : origin = 0x0A0000, length = 0x001000
   //FLASH_BANK2_SEC1  : origin = 0x0A1000, length = 0x001000
   //FLASH_BANK2_SEC2  : origin = 0x0A2000, length = 0x001000
   //FLASH_BANK2_SEC3  : origin = 0x0A3000, length = 0x001000
   //FLASH_BANK2_SEC4  : origin = 0x0A4000, length = 0x001000
   //FLASH_BANK2_SEC5  : origin = 0x0A5000, length = 0x001000
   //FLASH_BANK2_SEC6  : origin = 0x0A6000, length = 0x001000
   //FLASH_BANK2_SEC7  : origin = 0x0A7000, length = 0x001000
   //FLASH_BANK2_SEC8  : origin = 0x0A8000, length = 0x001000
   //FLASH_BANK2_SEC9  : origin = 0x0A9000, length = 0x001000
   //FLASH_BANK2_SEC10 : origin = 0x0AA000, length = 0x001000
   //FLASH_BANK2_SEC11 : origin = 0x0AB000, length = 0x001000
   //FLASH_BANK2_SEC12 : origin = 0x0AC000, length = 0x001000
   //FLASH_BANK2_SEC13 : origin = 0x0AD000, length = 0x001000
   //FLASH_BANK2_SEC14 : origin = 0x0AE000, length = 0x001000
   //FLASH_BANK2_SEC15 : origin = 0x0AF000, length = 0x000FF0

// FLASH_BANK0_SEC15_RSVD     : origin = 0x0AFFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

}


SECTIONS
{
   codestart        : > BEGIN, ALIGN(8)
   .text            : >> FLASH_BANK0_SEC8 | FLASH_BANK0_SEC9 | FLASH_BANK0_SEC10 | FLASH_BANK0_SEC11 | FLASH_BANK0_SEC12 | FLASH_BANK0_SEC13 | FLASH_BANK0_SEC14 | FLASH_BANK0_SEC15,   ALIGN(8)
   .cinit           : > FLASH_BANK1_SEC1,  ALIGN(8)
   .switch          : > FLASH_BANK1_SEC1,  ALIGN(8)
   .reset           : > RESET,                  TYPE = DSECT /* not used, */

   .stack           : > RAMM0 | RAMM1 | RAMLS1

#if defined(__TI_EABI__)
   .init_array      : > FLASH_BANK1_SEC1,  ALIGN(8)
   .bss             : > RAMLS2
   .bss:output      : > RAMLS3
   .bss:cio         : > RAMLS0
   .data            : > RAMLS5_7
   .sysmem          : > RAMLS2
   .const           : > FLASH_BANK1_SEC4_5,  ALIGN(8)
#else
   .pinit           : > FLASH_BANK1_SEC1,  ALIGN(8)
   .ebss            : > RAMLS2
   .esysmem         : > RAMLS2
   .cio             : > RAMLS0
   .econst          : > FLASH_BANK1_SEC4_5,  ALIGN(8)
#endif

    ramgs0 : > RAMGS0
    ramgs1 : > RAMGS0

    /*  Allocate IQ math areas: */
   IQmath           : > FLASH_BANK1_SEC1, ALIGN(8)
   IQmathTables     : > FLASH_BANK1_SEC2, ALIGN(8)
   DMABuffers       : > RAMGS0

   .TI.ramfunc      : LOAD = FLASH_BANK1_SEC1,
                      RUN = RAMLS0,
                      LOAD_START(RamfuncsLoadStart),
                      LOAD_SIZE(RamfuncsLoadSize),
                      LOAD_END(RamfuncsLoadEnd),
                      RUN_START(RamfuncsRunStart),
                      RUN_SIZE(RamfuncsRunSize),
                      RUN_END(RamfuncsRunEnd),
                      ALIGN(8)

}

Any idea where the issue might be ?

Thanks in advance,
Adrien

7 months ago

0 Aswin P 7 months ago

TI__Genius 9831 points

Hi Adrien,

I don't see any major issue in your linker cmd file. So, with the modified cmd file, where you able to run the application in the eval board?

Also it would be good to give the correct length instead of using '+' and '*' operator in the linker file.

Please try out the modified linker cmd file and try out in the eval board and check if you are facing any issues.

Thanks

Aswin

0 Adrien Thurin 7 months ago in reply to Aswin P

Intellectual 566 points

Hi Aswin,

I didn't test the modified cmd on the eval board Friday, only on the actual application. That being said, I just did, and it doesn't work either. Symptoms are the same, program is loaded but doesn't run. Even when removing '+' and '*' operators in the linker file.

Any idea what could be the issue ?

Thanks in advance,

Adrien

0 Aswin P 7 months ago in reply to Adrien Thurin

TI__Genius 9831 points

Hi Adrien,

Did you get any issues/errors while building the application? Lets confirm if the new cmd file is building fine and is getting build properly without any errors.

Is it possible to share the application for debug?

Thanks

Aswin

0 Adrien Thurin 7 months ago in reply to Aswin P

Intellectual 566 points

Hi Aswin,

No, no issue / error while building. Moreover, it worked fine on the launchpad with the default cmd file for C280039. The only thing that changed between something that works and something that doesn't is the cmd file.

How can I share the application privately ?

Thanks,

Adrien

0 Aswin P 7 months ago in reply to Adrien Thurin

TI__Genius 9831 points

Hi Adrien,

I meant whether you were able to run your application on the launchpad using the updated linker cmd file?

You can zip the application and share in this E2E.

Thanks

Aswin

0 Adrien Thurin 7 months ago in reply to Aswin P

Intellectual 566 points

Hi Aswin,

The application runs on the generic linker file on the launchpad.

Lightweight codes for hardware testing run on the lauchpad with the TI-modified linker file for F280033

Full application code does NOT run on the lauchnpad with the manually modified linker file (based on the TI-modified linker file for F280033).

I have tried to upload the application code here, but it is accessible to everyone and not just TI employees, which is not acceptable. Is there another way to provide you with the code ?

Best regards,

Adrien

0 Adrien Thurin 7 months ago in reply to Adrien Thurin

Intellectual 566 points

Hi Aswin,

Can you please let me know of a way to send you the application code that would preserve its confidentiality ?

Thanks in advance,

Adrien

+1 Aswin P 7 months ago in reply to Adrien Thurin

TI__Genius 9831 points

Hi Adrien,

I was going through the code that was shared and i have couple of findings -

1) In the deviceinit function(inside the device.c file), i see the memcpy function call seems to be commented, this should be uncommented.

memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

2) The linker cmd files looks fine

Please make the changes in the device.c file and try to rebuild the code and check.

Fullscreen 4377.device.c Download

//#############################################################################
//
// FILE:   device.c
//
// TITLE:  Device setup for examples.
//
//#############################################################################
//
//
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################

//
// Included Files
//
#include "device.h"
#include "driverlib.h"
#ifdef __cplusplus
using std::memcpy;
#endif
#ifdef CMDTOOL
#include "device_cmd.h"
#endif

//*****************************************************************************
//
// Function to initialize the device. Primarily initializes system control to a
// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
// and enabling the clocks to the peripherals.
// The function also configures the GPIO pins 20 and 21 in digital mode.
// To configure these pins as analog pins, use the function GPIO_setAnalogMode
//
// Note : In case XTAL is used as the PLL source, it is recommended to invoke
// the Device_verifyXTAL() before configuring PLL
//
//*****************************************************************************
void Device_init(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();
#ifdef CMDTOOL
    CMD_init();
#endif

#ifdef _FLASH
#ifndef CMDTOOL
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: InitFlash();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
#endif

    //
    // Set up PLL control and clock dividers
    //
    SysCtl_setClock(DEVICE_SETCLOCK_CFG);

    //
    // Make sure the LSPCLK divider is set to the default (divide by 4)
    //
    SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);

    //
    // These asserts will check that the #defines for the clock rates in
    // device.h match the actual rates that have been configured. If they do
    // not match, check that the calculations of DEVICE_SYSCLK_FREQ and
    // DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
    // expected if these are not correct.
    //
    ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
    ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);

#ifndef _FLASH
    //
    // Call Device_cal function when run using debugger
    // This function is called as part of the Boot code. The function is called
    // in the Device_init function since during debug time resets, the boot code
    // will not be executed and the gel script will reinitialize all the
    // registers and the calibrated values will be lost.
	// Sysctl_deviceCal is a wrapper function for Device_Cal
    //
    SysCtl_deviceCal();
#endif

    //
    // Turn on all peripherals
    //
    Device_enableAllPeripherals();

    //
    // Lock VREGCTL Register
    // The register VREGCTL is not supported in this device. It is locked to
    // prevent any writes to this register
    //
    ASysCtl_lockVREG();

    //
    // Configure GPIO20 and GPIO21 as digital pins
    //
    GPIO_setAnalogMode(20U, GPIO_ANALOG_DISABLED);
    GPIO_setAnalogMode(21U, GPIO_ANALOG_DISABLED);
}

//*****************************************************************************
//
// Function to turn on all peripherals, enabling reads and writes to the
// peripherals' registers.
//
// Note that to reduce power, unused peripherals should be disabled.
//
//*****************************************************************************
void Device_enableAllPeripherals(void)
{
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CPUBGCRC);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1BGCRC);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRCAL);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ERAD);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD2);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCANA);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB4);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSITXA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXA);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_LINA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_LINB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PMBUSA);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC0);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC1);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HICA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_AESA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPG1);
}

//*****************************************************************************
//
// Function to disable pin locks and enable pullups on GPIOs.
//
//*****************************************************************************
void Device_initGPIO(void)
{
    //
    // Disable pin locks.
    //
    GPIO_unlockPortConfig(GPIO_PORT_A, 0xFFFFFFFF);
    GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
    GPIO_unlockPortConfig(GPIO_PORT_H, 0xFFFFFFFF);
}

//*****************************************************************************
//
// Function to verify the XTAL frequency
// freq is the XTAL frequency in MHz
// The function return true if the the actual XTAL frequency matches with the
// input value
//
// Note that this function assumes that the PLL is not already configured and
// hence uses SysClk freq = 10MHz for DCC calculation
//
//*****************************************************************************
bool Device_verifyXTAL(float freq)
{
    //
    // Use DCC to verify the XTAL frequency using INTOSC2 as reference clock
    //

    //
    // Turn on XTAL and wait for it to power up using X1CNT
    //
    SysCtl_turnOnOsc(SYSCTL_OSCSRC_XTAL);
    SysCtl_clearExternalOscCounterValue();
    while(SysCtl_getExternalOscCounterValue() != SYSCTL_X1CNT_X1CNT_M);

    //
    // Enable DCC0 clock
    //
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC0);

    //
    // Insert atleast 5 cycles delay after enabling the peripheral clock
    //
    asm(" RPT #5 || NOP");

    //
    // Configures XTAL as CLKSRC0 and INTOSC2 as CLKSRC1
    // Fclk0 = XTAL frequency (input parameter)
    // Fclk1 = INTOSC2 frequency = 10MHz
    //
    // Configuring DCC error tolerance of +/-1%
    // INTOSC2 can have a variance in frequency of +/-10%
    //
    // Assuming PLL is not already configured, SysClk freq = 10MHz
    //
    // Note : Update the tolerance and INTOSC2 frequency variance as necessary.
    //
    return (DCC_verifyClockFrequency(DCC0_BASE,
                                     DCC_COUNT1SRC_INTOSC2, 10.0F,
                                     DCC_COUNT0SRC_XTAL, freq,
                                     1.0F, 10.0F, 10.0F));

}

//*****************************************************************************
//
// Error handling function to be called when an ASSERT is violated
//
//*****************************************************************************
void __error__(const char *filename, uint32_t line)
{
    //
    // An ASSERT condition was evaluated as false. You can use the filename and
    // line parameters to determine what went wrong.
    //
    ESTOP0;
}

Thanks

Aswin

0 Adrien Thurin 7 months ago in reply to Aswin P

Intellectual 566 points

Hi Aswin,

This solves the issue Thank you very much !

I have no idea how this came about. The incriminating line is not commented in the git repository, so I don't have a clue how this happened.

Anyway, the issue is fixed. Thanks again !

Best regards,

Adrien

C2000™︎ microcontrollers

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TMS320F280033: Large code : can load code but can't debug nor run