Part Number: TMS320F28P550SJ
- Several points of failure produced the same output. We would like to have a deeper understanding with this peripheral.
- Another variable that could throw questions and problems was that we are using a PCAN so we can read to the other end, providing another failing point as the pcan may not be configured properly either to match our prototype can speed.
- Calculate sampling point with timing bit calculator excel provided by ti
- Put configuration in both a PCAN and MCU
- From this point, I can only know if there are messages being received by PCAN, but the failure points are several. Therefore, I can only juggle with these questions by following a process of trial and error:
- Is the bit timing config properly set? I can just check the excel of bit timing calculation and check that the MCAN registers of bit timing are confgirued.
- Is the line delay affecting? Is properly configured the TDC register? Do not have any calculactions on which values should I select
- Is the clock properly set up? A part from checking the registers, we do not know if exists another way to be certain that the expect MCAN clock config is porperly set.
-
If I am not receiving messages, the config is not ok. If after playing around with the aforementioned points, I hook up thew oscilloscope and try to measure the bit times, the messages do not make sense. The issue here is that when the config is not working I am only seeing error messages at a periodicty of 50us which indicated (ACK and Form errors) instead of our expected dummy message with a totally different periodicity. Therfore, we are out of ideas on how to analize the messages being sent thorugh CAN in order to detect the problems in the peripheral.
- Ususally, when this happens is that the reciever node is not able to properly set the ACK bit in the message and the form error usually indicates that the bit timings are not properly configured.
-
After debugging the issue during all day, I have detected that the bit timing in our prototype is not as good as expected. I have detected an arbitration time of about 800ns for a 1MHz speed and about 160ns for a 5MHz speed. I am wondering if the issue is the main clock that feed the system. Can it be possible that by using the internal oscillator, the can clock exceeds the oscillator tolerance and therefore, the other CAN nodes are not able to sample properly the messages?