CLA to CPU Message Ram (CPU read)

Pavel Ruban

Other Parts Discussed in Thread: TMS320F28035

I have problems reading data in the CPU from the CLA to CPU Message Ram (0x001480), TMS320F28035 MCU.

I use the C-compiler for the CLA.

My register initialization for the CLA is similar to the one in "iir2p2z" from "F2806x_examlpes_cla" folder. I have followed the wiki page for the CLA C Compiler setup.

I have 1 CLA task running in a loop, doing some computation. In the CLA task some data is written to the 0x001480 CLA to CPU Message Ram. When I try to read this data in the CPU, the debugger crashes returning 2989 on all the registers.

Does the CLA need to be halted to be able to access this data? (reference to the TMS320x2803x CLA Reference Guide - A.1.2 CLA Program Memory p.152.) ? Or are the other reasons for this? Perhaps some debug issues?

Thanks in advance,

Pavel

over 13 years ago

0 Vishal_Coelho over 13 years ago

TI__Mastermind 20850 points

Pavel,

I assume you are writing to some variable in the cla to cpu message ram??. Are you reading this variable on the C28 side?

I think the examples have optimization turned on-- if you are not reading this variable on the c28 side it might have been optimized out.

Its odd that the debugger crashes on a debug read. I haven't come across this behavior before. Do the examples work correctly on the 28035 on your machine?

0 Pavel Ruban over 13 years ago in reply to Vishal_Coelho

Intellectual 275 points

Hello Vishal,

Yes the problem was reading the variable on the C28 side from the cla to cpu message ram.

I have temporary solved this problem, by changing some things in in the linker .cmd file.

When i had this problem, i was loading the Cla1Prog into FLASH and running from the RAML3 (0x009000). I changed to both loading and running from the RAML3 and the cla to cpu message ram write/read started to work properly.

Though i still want to load the Cla1Prog into FLASH and have both c28 and cla working properly. There might be some conflict of c28 and cla been programmed into the same FLASH? I have uploaded my linker file, perhaps there are some errors in the setup.

0184.F28035_CLA_C28.c

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--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
_Cla1Prog_Start = _Cla1funcsRunStart;
MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   RAML0       : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 */
   RAML3       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L3 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHH      : origin = 0x3E8000, length = 0x002000     /* on-chip FLASH */
   FLASHG      : origin = 0x3EA000, length = 0x002000     /* on-chip FLASH */
   FLASHF      : origin = 0x3EC000, length = 0x002000     /* on-chip FLASH */
   FLASHE      : origin = 0x3EE000, length = 0x002000     /* on-chip FLASH */
   FLASHD      : origin = 0x3F0000, length = 0x002000     /* on-chip FLASH */
   FLASHC      : origin = 0x3F2000, length = 0x002000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F6000, length = 0x001F80     /* on-chip FLASH */
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start

_Cla1Prog_Start = _Cla1funcsRunStart;

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   RAML0       : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 */
   RAML3       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L3 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHH      : origin = 0x3E8000, length = 0x002000     /* on-chip FLASH */
   FLASHG      : origin = 0x3EA000, length = 0x002000     /* on-chip FLASH */
   FLASHF      : origin = 0x3EC000, length = 0x002000     /* on-chip FLASH */
   FLASHE      : origin = 0x3EE000, length = 0x002000     /* on-chip FLASH */
   FLASHD      : origin = 0x3F0000, length = 0x002000     /* on-chip FLASH */
   FLASHC      : origin = 0x3F2000, length = 0x002000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F6000, length = 0x001F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_P0  : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

   IQTABLES    : origin = 0x3FE000, length = 0x000B50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEB50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEBDC, length = 0x0000AA	  /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAML1       : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 */
   RAML2       : origin = 0x008C00, length = 0x000400     /* on-chip RAM block L2 */

   FLASHB      : origin = 0x3F4000, length = 0x002000     /* on-chip FLASH */


   CLA1_MSGRAMLOW       : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH      : origin = 0x001500, length = 0x000080

}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

   /* Allocate program areas: */
   .cinit              : > FLASHA      PAGE = 0
   .pinit              : > FLASHA,     PAGE = 0
   .text               : > FLASHA      PAGE = 0
   codestart           : > BEGIN       PAGE = 0



  Cla1Prog         :  LOAD = RAML3,
                      RUN = RAML3,
                      LOAD_START(_Cla1funcsLoadStart),
                      LOAD_END(_Cla1funcsLoadSize),
                      RUN_START(_Cla1funcsRunStart),
                      PAGE = 0

      CLAscratch       :
                        { *.obj(CLAscratch)
                        . += CLA_SCRATCHPAD_SIZE;
                        *.obj(CLAscratch_end) } > RAML1,  PAGE = 1


  Cla1ToCpuMsgRAM     : > CLA1_MSGRAMLOW,    PAGE = 1
  CpuToCla1MsgRAM     : > CLA1_MSGRAMHIGH ,  PAGE = 1
  Cla1DataRam1		  : > RAML1,		     PAGE = 1

  
     ramfuncs         : LOAD = FLASHD,
                         RUN = RAML0,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0 
						 
   csmpasswds          : > CSM_PWL_P0  PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0


   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1
   .ebss               : > RAML2       PAGE = 1
   .esysmem            : > RAML2       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0

   .bss_cla		       : > RAML1,     PAGE = 1
   .const_cla	       : > RAML1,     PAGE = 1


   /* Allocate IQ math areas: */
   IQmath              : > FLASHA      PAGE = 0            /* Math Code */
   IQmathTables        : > IQTABLES,   PAGE = 0, TYPE = NOLOAD

In the linker file i do no load anything to the ramfuncs.

Best Regards,

Pavel

0 Vishal_Coelho over 13 years ago in reply to Pavel Ruban

TI__Mastermind 20850 points

Hi Pavel,

If you are loading the Cla1Prog section into Flash you will need to memcpy it over to RamL3 on startup to get it to work.. take a look at the ClaAdcFirFlash example in the regular examples folder. You can use the same setup in that example

The linker will give an error if you have mapped two sections to the same memory

0 Pavel Ruban over 13 years ago in reply to Vishal_Coelho

Intellectual 275 points

Problem solved, thank you for your answer.

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CLA to CPU Message Ram (CPU read)