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Max. XCLKOUT on TMS320F28062

BobW
Intellectual 280 points
Other Parts Discussed in Thread: TMS320F28062

The datasheet for the TMS320F28062 shows a maximum XCLKOUT frequency of 20MHz. However, SYSCLKOUT can be as high as 90MHz when the PLL is used. The maximum divider value between SYSCLKOUT and XCLKOUT is /4. So my question is, what happens to XCLKOUT when SYSCLKOUT is 90MHz and the divider value (XCLKOUTDIV) is set to /4?

  • 0
    Guru 20525 points

    Hi Robert!

    Yes. There is limit 20 MHz according data sheet. But nonetheless I think you will get on the XCLKOUT pin 22.5 MHz (at least for example you can refer to this thread http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/279762.aspx).

    Regards,

    Igor

  • 0 in reply to Igor Gorbachev
    TI__Guru 60865 points

    Robert,

    No matter what divider you choose, be it /4 or /2 or /1, you will get something out of the XCLKOUT pin with a of frequency of SYSCLKOUT/divider.  If the frequency is high, it may not look like a “textbook” square wave, due to I/O buffer limitations.  Because of this, we usually recommend that you drive out the clock only in /4 mode (and we also use /4 XCLKOUT for production tests).    

    For 80MHz SYSCLKOUT, the I/O buffers can definitely handle 20MHz (by setting /4) but not 40MHz (by setting /2).  The max XCLKOUT frequency was thus spec'ed as 20MHz, and that was what was used for production testing.  

    At some point the F2806x device was upgraded from 80MHz to 90MHz max SYSCLKOUT, but we forgot to change this from 20MHz to 22.5MHz in the datasheet.  I confirmed that driving out XCLKOUT at 22.5MHz is ok; we will get the datasheet updated.

  • 0 in reply to Devin Cottier
    Intellectual 280 points

    Thank you for the info/clarification.

    Your help is much appreciated.