• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 82 subscribers
  • Views 901 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

rts_2800_ml.lib source code for interrupt context save and restore

Jaiganesh Jayaraman76473
Prodigy 250 points


Hi all,

I want to modify the interrupt full context and restore subroutines to add some OS related instructions for context switching. I am not able to find the assembly source code for the same in rtssrc.zip just like I$$SAVE for C24x platforms available in saverest.asm. My target is TMSF28335 and code gen tool verison is 5.2.11.  

I am trying to exclude the library and want to build the code by adding the required library source from rtssrc.zip.

Please help.

Thanks,

Jaiganesh

  • 0
    TI__Guru 61235 points

    Hello Jaiganesh,

    The C28x compiler does NOT call save/restore functions in the RTS library.  The compiler does an intelligent save, generating code on the fly to save only the registers that need to be saved.  The C24x compiler on the other hand did a dumb save, where it called the save/restore functions to save every register (whether the register was used in the ISR or not).  So, as you've noticed, you're not going to find and save/restore source code in the C28x RTS library.

    Perhaps you can just make a function call as the first thing in each ISR to do the additional stuff you need done.  You'd need to include this in each ISR, but it is not so bad.  There are a finite number of ISRs, so you just do it.

    Regards,

    David

  • 0 in reply to David M. Alter
    Prodigy 250 points

    Hi David,

    Thanks for your reply. I have few more questions.

    CPU instruction set manual says "C28x automatically saves the following registers - T,ST0,AH,AL,PH,PL,AR1,AR0,DP,ST1,DBGSTAT,IER,PC.  

    1. Is it ok if I do the following in my ISR to save all these registers no matter whether they are used within the ISR?

    ASP
    PUSH AR1H:AR0H ; Save if used
    PUSH XAR2
    PUSH XAR3
    PUSH XAR4
    PUSH XAR5
    PUSH XAR6
    PUSH XAR7
    PUSH XT
    PUSH RPC

    2. Do I need to use "ASP" instruction. I read that this is again added by C28x compiler automatically at the beginning of ISR and NASP at the end of ISR.

    3. Do I need to do "PUSH RPC" also into the stack.

    This is the first time I am getting into assembly level.

    Thanks for your help,

    Jaiganesh

  • 0 in reply to Jaiganesh Jayaraman76473
    TI__Guru 61235 points

    Jaiganesh,

    What is motivating you to write your ISR in assembly?  Do you really have such high performance requirements that C-code cannot get the job done?  Assembly is going to be a lot more trouble than C.  If you are that pinched for performance, then it contradicts to be saving all the registers (as you proposed) whether you are using them or not in the ISR.  My suggestion would be to write the ISR in C.

    Jaiganesh Jayaraman76473 said:

    CPU instruction set manual says "C28x automatically saves the following registers - T,ST0,AH,AL,PH,PL,AR1,AR0,DP,ST1,DBGSTAT,IER,PC.  

    1. Is it ok if I do the following in my ISR to save all these registers no matter whether they are used within the ISR?

    ASP
    PUSH AR1H:AR0H ; Save if used
    PUSH XAR2
    PUSH XAR3
    PUSH XAR4
    PUSH XAR5
    PUSH XAR6
    PUSH XAR7
    PUSH XT
    PUSH RPC

    2. Do I need to use "ASP" instruction. I read that this is again added by C28x compiler automatically at the beginning of ISR and NASP at the end of ISR.

    3. Do I need to do "PUSH RPC" also into the stack.

    To your questions, the easy way to get your arms around the assembly ISR is to cheat and look at what the compiler does.  Here is an example of compiler generated ASM code for an ISR entry:

    Compiler_Generated_ISR:
      ASP       ; [CPU_]
      PUSH      RB                    ; [CPU_]
      MOVL      *SP++,XT              ; [CPU_]
      MOVL      *SP++,XAR4            ; [CPU_]
      MOVL      *SP++,XAR5            ; [CPU_]
      MOVL      *SP++,XAR6            ; [CPU_]
      MOVL      *SP++,XAR7            ; [CPU_]
      MOV32     *SP++,STF             ; [CPU_]
      MOV32     *SP++,R0H             ; [CPU_]
      MOV32     *SP++,R1H             ; [CPU_]
      MOV32     *SP++,R2H             ; [CPU_]
      MOV32     *SP++,R3H             ; [CPU_]
      SETFLG    RNDF32=1, RNDF64=1    ; [CPU_]
      CLRC      PAGE0,OVM             ; [CPU_]
      CLRC      AMODE                 ; [CPU_]
    ;ISR body code starts here

     

    You'd have to add context saves for any other registers that are used (my example ISR that created the above didn't use every register), and remove the saves for any registers that aren't used (well, you could leave these saves, but it just wastes cycles).

    Note that you should push XAR0 and XAR1 if they are used.  The automatic context saving pushes AR0H and AR1H.  This is not sufficient with large memory model, so you need to save the entire XARx register.

    You do not need to save RPC.  It is not used with interrupts. It is used for LCR (long call) instruction.

    Regards,

    David