Roadmap available for future Dual Core Delfino

Paul,

I'm not sure about the roadmap, but could you use the EMIF peripheral + external memory to get the extra RAM you need?

Otherwise we have the C28346, which is 300MHz single-core C28x, 516KB RAM (but no integrated analog).

Hello Devin,

Thank you for your reply. We already use external RAM on a Flash based F2812, we don't execute from it as access time is slower than internal Flash. I'm unsure if there is a solution where we could use external RAM that is as fast as the internal SARAM.

We are looking for a pure RAM based device to help with development. At the moment we develop in RAM using the emulation environment and build for Flash when the code goes in the product. This changes some details in different parts of our software and we end up testing the code twice (that is the RAM and then the Flash versions). Ideally we will develop in RAM and that will be an accurate representation of when our product is working in the field.

You are correct the C28346 has an adequate amount of RAM for our needs but of course is lacking the dual core power and functionality of the C28377 devices.

Is there anyone who might know what the future dual core developments will be?

Best regards

Hi Paul,

What are you using for your development environment? If you haven't already, you might consider upgrading to CCSv5 or CCSv6.  These IDEs have flash programming much more integrated, making it easier to develop in flash from the beginning (see the below forum post for getting flash programming support in CCSv5 if needed)      

http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/314938.aspx

Its probably also worth mentioning that the effective flash performance on F2837xD is much better than F2812 due to increased flash pre-fetch width (144-bits for F2837xD vs 64-bits on F2812).  At 200MHz, we expect effective flash memory performance to be around 175MIPS for typical application code.   

That's useful information thanks. It looks like our way of working will change for the better.

I have to admit we are using CCSv3.3 so looking forward to using all of the new features when we upgrade (which will probably be to the latest version).

I'd still like to know about future Delfino dual-core roadmap / developments, any idea when such information might become available?

Regards

Paul

Paul,

Sure we'd love to share more about our Delfino roadmap.  Do you have a local TI sales person you work with?  The first step would be to reach out to them to get the latest update on the roadmap.  If not, would you be willing to share your contact email address for me to speak with you off the forum?

Loretta

Hi Loretta,

I'm happy to contact someone locally but have not been in contact with a TI sales person for a long time. What is the quickest way of checking who the best contact is please?

Paul

Paul,

What region do you work out of and what's the company name?

Loretta

The company name is M Squared Lasers, and we are in Glasgow, Scotland.

http://www.m2lasers.com/

Paul

Paul,

I can tell you that a RAM only device isn't in our plans anytime soon.  We did some devices like that in the past on the high-end (C2834x) so we could run in a process to get more MHz then we could with the existing flash technology.  We also did a few at the low end for cost reasons (a flash free process costing less). This is all in process technology that started in the early 2000s.  With existing process technologies 14 years later the gap between Flash and RAM costs on the low end is small enough where it doesn't buy us enough to justify the further development, and on the high end we have addressed by adding more cores and increasing flash performance.

I do understand that having all full speed memory would be ideal, but we aren't quite there yet where we could make cost effective devices with hundreds of KB of RAM to go along with Flash for program storage.

Hi Chris,

Many thanks for the information. That's all we need for now.

Paul