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We have got an application whose graph drawing has states transitions that occur after a period of time AND/OR a condition is met and other transitions (from the same state to different one) if another condition is met.
Even though the washer machine is a clear example of timing an condition triggered transitions we cannot figure out how can we mix both at the same time and whether there is an order of prevalence between them.
Regards
Daniel
Daniel,
For SpinTAC Plan, the transitions will be processed in the order in which they are added in the configuration. So if you have two transitions out of one state and either transition could be taken, the transition that was added into the configuration first will be taken.
In your example does your state have a transition that happens after a period of time, a transition that will happen if a condition occurs, and other transitions that will happen if other conditions occurs?
Could you provide a drawing of your state machine so that I can understand it better?
In SpinTAC Plan it won't process transitions until the state timer has elapsed, so if you want transitions to occur after a fixed period of time that is implemented in SpinTAC Plan.
Daniel,
Thanks for the very helpful drawing. This is all very doable using Plan. The way to enforce the time condition is by setting the minimum state time when you configure the state. I've included an example using your states below:
//Example: STVELPLAN_addCfgState(handle, VelSetpoint[pups], StateTimer[ticks]); STVELPLAN_addCfgState(stObj->velPlanHandle, 0, 1L); // Idle STVELPLAN_addCfgState(stObj->velPlanHandle, _IQ(x * ST_SPEED_PU_PER_KRPM), 1L); // State_1 STVELPLAN_addCfgState(stObj->velPlanHandle, _IQ(x * ST_SPEED_PU_PER_KRPM), 15000L); // State_2 STVELPLAN_addCfgState(stObj->velPlanHandle, _IQ(x * ST_SPEED_PU_PER_KRPM), 10000L); // State_3
The StateTimer represents the minimum time that it will remain in the state. It configured as ticks or samples. So my example code above assumes that your sample time is 0.001 sec.
I want precisely the opposite: The time declared in the graph should be the MAXIMUN. Normal operation is "related to" the accomplishment of certain conditions. If the conditions are never met (for a hardware failure) then the time should be the limit. How could I codify this?
So for example you want a transition from State_3 to Idle if condition ==1 OR time > 10s?
To do this you would need to use a second variable to act as a timer and set your minimum state time to 0. You would need to setup a condition on your timer variable for the maximum time in state value. Then in the transition you would set it to evaluate either (OR) condition == 1 or time == 10. You would also need to setup a way to increment your timer variable. This could be done either as an Action inside of Plan or by incrementing a variable outside of Plan and passing the value in. So the code would look like this:
// ST_setupPlan Function Code //Example: STVELPLAN_addCfgState(handle, VelSetpoint[pups], StateTimer[ticks]); STVELPLAN_addCfgState(stObj->velPlanHandle, 0, 1L); // StateIdx0: Idle STVELPLAN_addCfgState(stObj->velPlanHandle, 0, 1L); // StateIdx1: State_3 //Example: STVELPLAN_addCfgVar(handle, VarType, InitialValue); STVELPLAN_addCfgVar(stObj->velPlanHandle, ST_VAR_INOUT, 0); // VarIdx0: Timer STVELPLAN_addCfgVar(stObj->velPlanHandle, ST_VAR_IN, 0); // VarIdx1: Condition Variable //Example: STVELPLAN_addCfgCond(handle, VarIdx, Comparison, Value1, Value2) STVELPLAN_addCfgCond(stObj->velPlanHandle, 0, ST_COMP_EQ, 10000, 0); // CondIdx0: Timer Elapsed STVELPLAN_addCfgCond(stObj->velPlanHandle, 1, ST_COMP_EQ, 1, 0); // CondIdx1: Condition Variable == 1 //Example: STVELPLAN_addCfgTran(handle, FromState, ToState, CondOption, CondIdx1, CondiIdx2, AccLim, JrkLim); STVELPLAN_addCfgTran(stObj->velPlanHandle, 1, 0, ST_COND_OR, 0, 1, _IQ(0.1), _IQ20(1)); // From State_3 to Idle //Example: STVELPLAN_addCfgAct(handle, StateIdx, CondOption, CondIdx1, CondIdx2, VarIdx, Operation, Value, ActionTriger); STVELPLAN_addCfgAct(stObj->velPlanHandle, 0, ST_COND_NC, 0, 0, 0, ST_ACT_EQ, 0, ST_ACT_ENTR); // Entering Idle reset TimeOut to 0 // ST_runPlan Function gPlanTimeOut++; // Increment TimeOut STVELPLAN_setVar(stObj->velPlanHandle, 0, gPlanTimeOut); // Pass TimeOut value into Plan (Must Call Before STVELPLAN_run) STVELPLAN_getVar(stObj->velPlanHandle, 0, &gPlanTimeOut); // Pass TimeOut value into Plan (Must Call After STVELPLAN_run)
This is an example of what it would look like for the State_3 to Idle transition. You would need to fill in the rest of the pieces for the rest of the state machine.