Code Composer Studio v6.0.1 not producing correct results inside CpuTimer0 ISR

Dear All,

I am using Code Composer Studio v6.0 for developing embedded application on TMS320F28335 platform.

I am using CpuTimer0 to schedule an event. Inside CpuTimer0 ISR, i am setting a flag immediately after entering ISR. This flag is detected in while(1) super-loop for further processing. Flag doesn't sets immediately after entering ISR and hence processing doesn't starts after entering while(1) super-loop.

However, if a add a delay of one instruction cycle immediately after entering ISR and before setting flag, the flag is detected in while(1) super-loop and further processing starts.

Why is the delay required immediately after entering ISR and before setting the flag, so that the flag can be detected correctly in while(1) super-loop ?

I have pasted  the code below.

Thank you,

Sunil Sawant

/*----------------------- ISR code without delay - Start ------------------------- */

// INT1.7
interrupt void  TINT0_ISR(void)      // CPU-Timer 0
{
    // Insert ISR Code here
    tTMS320F2812ECanaTransactionStatusFlags.TransactionCycle.bit.b1CanTxnCycleStart = TRUE;

    // Clear Timer0 interrupt flag
    CpuTimer0Regs.TCR.bit.TIF = 1;

    // To receive more interrupts from this PIE group, acknowledge this interrupt
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    IER |= M_INT1;    // Enable INT1
    EINT;
    return;


    // Next two lines for debug only to halt the processor here
    // Remove after inserting ISR Code
    //asm ("      ESTOP0");
    //for(;;);
}

/*----------------------- ISR code without delay - End ------------------------- */

/*----------------------- ISR code with delay - Start ------------------------- */

// INT1.7
interrupt void  TINT0_ISR(void)      // CPU-Timer 0
{
    // Insert ISR Code here

    // This is delay
    GpioDataRegs.GPBTOGGLE.bit.GPIOB0 = 1;

    tTMS320F2812ECanaTransactionStatusFlags.TransactionCycle.bit.b1CanTxnCycleStart = TRUE;

    // Clear Timer0 interrupt flag
    CpuTimer0Regs.TCR.bit.TIF = 1;

    // To receive more interrupts from this PIE group, acknowledge this interrupt
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    IER |= M_INT1;    // Enable INT1
    EINT;
    return;


    // Next two lines for debug only to halt the processor here
    // Remove after inserting ISR Code
    //asm ("      ESTOP0");
    //for(;;);
}

/*----------------------- ISR code with delay - End ------------------------- */