TMX320F28075 CLA PWM access

Hi,

  AccessProtectionRegs.NMAVFLG is 0, ie. no access write error occured.

Just for clarification, these access violation registers are only applicable for accesses to memories and not to peripheral.

- CLA2 value is 0.

What is the actual value in this register (when you read from CPU or from memory watch window)?

Regards,

Vivek Singh

Hi Vivek,

Thank you for your reply.

In the inititalization part of my firmware EPwm3Regs.CMPA.bit.CMPA is set to 1300 by the CPU. (just for test purposes.)
I can see it in the CCS debugger watch window too.

In the CLA task #4 I try to set (override; again just for test purposes) EPwm3Regs.CMPA.bit.CMPA to 125 as follows:
EPwm3Regs.CMPA.bit.CMPA = 125;
Then I read it back:
CLA2 = EPwm3Regs.CMPA.bit.CMPA;
However reading CMPA back I still can see CLA2 being 0, and CMPA still shows the original 1300 value in the CCS watch window, as it has been set by the CPU. So I assume the write in the CLA task is not allowed/disabled somehow.

best regards,
Gyula

Hi,

I've done a test, which accesses are available in the CLA, and I experience a problem with accessing peripheral registers.

#pragma DATA_SECTION(vSense_Raw,"Cla1ToCpuMsgRAM");

volatile long vSense_Raw;

#pragma DATA_SECTION(iRef_Raw,"CpuToCla1MsgRAM");

volatile long iRef_Raw;

interrupt void Cla1Task4(void)

{

//vSense_Raw = iRef_Raw; //Testing CPU-CLA-CPU communication : OK

//vSense_Raw = (long)(AdcaResultRegs.ADCRESULT0); // Testing ADC result register access. : OK!

//vSense_Raw = (long)(EPwm1Regs.TBCTL.all); // TEsting EPWM Periph register access. : NOT OK! (clock enabled)

//ECap1Regs.ECEINT.all = 0xfe; vSense_Raw = (long)(ECap1Regs.ECEINT.all); // Testing ECAP Periph register access. : NOT OK! (clock enabled)

//EQep1Regs.QEINT.all = 0xfe; vSense_Raw = (long)(EQep1Regs.QEINT.all); // Testing EQEP Periph register access. : NOT OK! (clock enabled)

//vSense_Raw = (long)(AdcaRegs.ADCCOUNTER.all); // Testing ADC control register access. : OK!

DacaRegs.DACOUTEN.bit.DACOUTEN = 1; vSense_Raw = (long)(DacaRegs.DACOUTEN.all); // Testing DAC control register access. : NOT OK!

}

Could you please also test, if you have same results?

According to the datasheet, these accesses should have worked.(sprs902a)

Regards,

Attila Meszaros

Hi Attila,

Could you please test if the MEALLOW bit in the MSTF register is changed when executing the _meallow() command?

Do you see the command in the disassembly code?

Please check if you can access these register when not operating in debug mode. Try to see if the PWM can be accessed when the emulator is not connected.

Hello Simon,

Thank you for your reply. We work on this problem together with Attila.

We checked MSTF MEALLOW bit.  This is in the disassembly code:

     455                      .dwpsn  file "../src/LTE_NCU-Tasks_C.cla",line 214,column 2,is_stmt,isa 0
     456 00000000 0000          MEALLOW   ; [CPU_] |214|
         00000001 7F90

Observing by the debugger we can see it randomly toggling. (which is OK, since the debugger watch is async relating to the CLA execution.)

We downloaded the code to the TMX FLASH, and we could not observe the expected modification of the PWM signal, even after disconnecting the debugger and applying a power off/on cycle. So I think we still cannot access the PWM.

Thank you for your effort for helping us,

(Note: we use CCS6.1.1, controlSuite v170, and we can see the same symptom on two independent HW).

best regards,

Gyula

Hi,

We have done this testing and don't see any issue with access to EPWM register from CLA.

Is it possible to attach the sample project which has this issue. We could try running that at our end.

Also have you tried it on more than one silicon? Just to confirm issue is not with specific silicon.

Regards,

Vivek Singh 

Hi,

I've created a project file, which shows the problem. It contains also a few lines, which reads out our current silicon PARTID, REVID. The actual silicon values are written in the comment field of the particular lines.

claaccess.zip

Could you please check, if some setting is missing in our project? Or is it the Silicon revision, what we have?

Regards,

Attila Meszaros