Hi Darshan,
The SCI module has "multiprocessor wake-up modes", you can find documentation on this in the corresponding user's guide and also in the multi-day workshop module 12 (thanks Ken Schachter). Using the "Address-Bit Wake-Up Mode" an extra bit is added to the data frame (Addr/Data bit) creating the so-called 9-bit mode. When this bit is a 1 the frame is processed as an address frame generating an SCI ISR then your SW compares received address to a value stored in memory and clears SLEEP bit if it is a match, causing the SCI to interrupt on subsequent data frames. If it is not a match, then the SLEEP bit stays enabled and the next SCI interrupt occurs only on the next address frame.
Jeff
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