Excessive pull-up current for F28335 SCIRXA

I was trying to debug a recieve interrupt that was never running for SCI-A, and tracked the problem back to the RX pin itself (GPIO28). The device communicating with the F28335 has a maximum current of 2mA on its serial lines, and the voltage is only varying between 1.85V and 3.3V.

Using SCI-B (GPIO 15), this problem does not occur; the 2mA is sufficient to vary the line voltage between 0 and 3.3V and the recieve interrupt is called as expected.

In both cases, I commanded the pull-up resistors to be disabled, but on the command

GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;

GPIO 28 goes high (and puts out a lot of current to stay high) while

GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 2;

leaves GPIO 15 low.

Do I have a defective board? Or is there something I overlooked that will make SCI-A work correctly?

code:

//-------------------------------------------------------------------------------------------------------------------------
#include "include/DSP2833x_Device.h"     // Device Headerfile and Examples Include File
#include "include/DSP2833x_Examples.h"   // DSP2833x Examples Include File

#define SCIPORT 0//0=A, 1=B, 2=C
#define CPU_FREQ   150E6
#define LSPCLK_FREQ  CPU_FREQ/4
#define SCI_FREQ   9500//100E3
#define SCI_PRD   LSPCLK_FREQ/8/SCI_FREQ-1

interrupt void sciTxIsr(void);
interrupt void sciRxIsr(void);

// Global variables
struct SCI_REGS *thisSci;
char txBuffer[]="Hello World!\0\0";
char rxBuffer[16];// Received data

void main(void){
    InitSysCtrl();// PLL, WatchDog, enable Peripheral Clocks
    DINT;// Disable CPU interrupts
    IER = 0x0000;// Disable CPU interrupts
    IFR = 0x0000;// clear all CPU interrupt flags
    InitPieCtrl();// Initialize PIE control registers (all PIE interrupts disabled and flags cleared; DSP2833x_PieCtrl.c)
    InitPieVectTable();// Initialize the PIE vector table with pointers to the shell Interrupt Service Routines (found in DSP2833x_DefaultIsr.c) DSP2833x_PieVect.c

    EALLOW; // This is needed to write to EALLOW protected registers
#if SCIPORT==0
    PieVectTable.SCIRXINTA = &sciRxIsr;// Interrupts are re-mapped to ISR functions
    PieVectTable.SCITXINTA = &sciTxIsr;// Interrupts are re-mapped to ISR functions
#elif SCIPORT==1
    PieVectTable.SCIRXINTB = &sciRxIsr;// Interrupts are re-mapped to ISR functions
    PieVectTable.SCITXINTB = &sciTxIsr;// Interrupts are re-mapped to ISR functions
#elif SCIPORT==2
    PieVectTable.SCIRXINTC = &sciRxIsr;// Interrupts are re-mapped to ISR functions
    PieVectTable.SCITXINTC = &sciTxIsr;// Interrupts are re-mapped to ISR functions
#endif

    //--- Group A pins
    GpioCtrlRegs.GPACTRL.all  = 0x00000000;        // QUALPRD = SYSCLKOUT for all group A GPIO
    GpioCtrlRegs.GPAQSEL1.all = 0x00000000;        // No qualification for all group A GPIO 0-15
    GpioCtrlRegs.GPAQSEL2.all = 0x00000000;        // No qualification for all group A GPIO 16-31
    GpioCtrlRegs.GPADIR.all   = 0xFFFFFFFF;        // All group A GPIO are outputs
    GpioCtrlRegs.GPAPUD.all   = 0xFFFFFFFF;        // Pullups disabled
    GpioCtrlRegs.GPAMUX1.all=   0x00000000;
    GpioCtrlRegs.GPAMUX2.all=   0x00000000;

    GpioCtrlRegs.GPBCTRL.all  = 0x00000000;        // QUALPRD = SYSCLKOUT for all group B GPIO
    GpioCtrlRegs.GPBQSEL1.all = 0x00000000;        // No qualification for all group B GPIO 32-47
    GpioCtrlRegs.GPBQSEL2.all = 0x00000000;        // No qualification for all group B GPIO 48-63
    GpioCtrlRegs.GPBDIR.all   = 0xFFFFFFFF;        // All group B GPIO are outputs
    GpioCtrlRegs.GPBPUD.all   = 0xFFFFFFFF;        // Pullups disabled
    GpioCtrlRegs.GPBMUX1.all=   0x00000000;
    GpioCtrlRegs.GPBMUX2.all=   0x00000000;

    EDIS;   // This is needed to disable write to EALLOW protected registers

    GpioDataRegs.GPACLEAR.all=0xFFFFFFFF;//zero GPIO pins 0-31
    GpioDataRegs.GPBCLEAR.all=0xFFFFFFFF;//zero GPIO pins 32-63

    EALLOW;
#if SCIPORT==0
    GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3;  // Asynch input GPIO28 (SCIRXDA)
    GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;   // Configure GPIO28 for SCIRXDA operation
    GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;   // Configure GPIO29 for SCITXDA operation*/
    /*GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3;  // Asynch input GPIO28 (SCIRXDA)
    GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1;   // Configure GPIO28 for SCIRXDA operation
    GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1;   // Configure GPIO29 for SCITXDA operation*/
#elif SCIPORT==1
    GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3;  // Asynch input GPIO15 (SCIRXDC)
    GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 2;   // Configure GPIO15 for SCIRXDC operation
    GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 2;   // Configure GPIO14 for SCITXDC operation*/
    /*GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 3;  // Asynch input GPIO15 (SCIRXDC)
    GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 3;   // Configure GPIO15 for SCIRXDC operation
    GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 3;   // Configure GPIO14 for SCITXDC operation*/
#elif SCIPORT==2
    GpioCtrlRegs.GPBQSEL2.bit.GPIO62 = 3;  // Asynch input GPIO62 (SCIRXDC)
    GpioCtrlRegs.GPBMUX2.bit.GPIO62 = 1;   // Configure GPIO62 for SCIRXDC operation
    GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 1;   // Configure GPIO63 for SCITXDC operation*/
#endif
    EDIS;

#if SCIPORT==0
    thisSci=(struct SCI_REGS*)&SciaRegs;
#elif SCIPORT==1
    thisSci=(struct SCI_REGS*)&ScibRegs;
#elif SCIPORT==2
    thisSci=(struct SCI_REGS*)&ScicRegs;
#endif
    thisSci->SCICCR.all =0x0007;   // 8N1  No loopback, async mode, idle-line protocol
    thisSci->SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK, Disable RX ERR, SLEEP, TXWAKE
    thisSci->SCICTL2.bit.TXINTENA =1;
    thisSci->SCICTL2.bit.RXBKINTENA =1;
    thisSci->SCIHBAUD = (long)(SCI_PRD) >> 8;
    thisSci->SCILBAUD = (long)(SCI_PRD) & 0xFF;
    //thisSci->SCICCR.bit.LOOPBKENA =1; // Enable loop back

    thisSci->SCICTL1.all =0x0023;     // Relinquish SCI from Reset

    // Enable interrupts required for this example
    PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
#if SCIPORT==0
    PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1; SCIRXINTA
    PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2; SCITXINTA
#elif SCIPORT==1
    PieCtrlRegs.PIEIER9.bit.INTx3=1;     // PIE Group 9, INT3; SCIRXINTB
    PieCtrlRegs.PIEIER9.bit.INTx4=1;     // PIE Group 9, INT4; SCITXINTB
#elif SCIPORT==2
    PieCtrlRegs.PIEIER8.bit.INTx5=1;     // PIE Group 8, INT5; SCIRXINTC
    PieCtrlRegs.PIEIER8.bit.INTx6=1;     // PIE Group 8, INT6; SCITXINTC
#endif
    IER = 0x100; // Enable CPU INT
    EINT;// Enable CPU INT

    thisSci->SCITXBUF=0;//trigger SCITXINTA

    for(;;);// Step 6. IDLE loop. Just sit and loop forever
}

interrupt void sciTxIsr(void){
    static Uint32 ii=0;
    thisSci->SCITXBUF=txBuffer[ii++]; // Send data
    if(ii >= sizeof(txBuffer)){
        for(ii=0;ii<50*65535;ii++);
        ii = 0;
    }
    PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

interrupt void sciRxIsr(void){
    static Uint16 ii=0;
    rxBuffer[ii++] = thisSci->SCIRXBUF.all;  // Read data
    if(ii >= sizeof(rxBuffer))
        ii = 0;
    PieCtrlRegs.PIEACK.all|=0x100;   // Issue PIE ack
}

//===========================================================================
// End of code
//===========================================================================