Questions on TMDSIDDK_v1.0 (C2000 DesignDRIVE Develoment Kit for Industrial Motor Control)

I have questions on how to enable interrupt for ADC

Below is ADC configuration in the code IDDK_PM_Servo_F2837X code

Herein, ADC A/B/C/D is used to measure several signals including resolver signals. So far so good to me.

However, to make interrupt enabled, the only one ADC C module to measure sin signal in resolver is set up interrupt enabled.

There is no interrupt enabling setting for ADC D module to measure cos signal in resolver. Does it work? If it work, would you tell me how?

/* adc interrupt enabling setting for adc configuration below */

AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;
AdccRegs.ADCINTSEL1N2.bit.INT1CONT = 1;
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;

//PWM11 INT is used to trigger Motor Control ISR
EPwm11Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA; // INT on PRD event
EPwm11Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm11Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on every event

PieVectTable.ADCC1_INT = &ResolverISR;

PieVectTable.EPWM11_INT = &MotorControlISR;

PieCtrlRegs.PIEIER3.bit.INTx11 = 1; // Enable PWM11INT in PIE group 3
PieCtrlRegs.PIEIER1.bit.INTx3 = 1; // Enable ADCC1INT in PIE group 1

/* adc configuration */

// Shunt Motor Currents (SV) @ A4
// ********************************
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 4; // SOC0 will convert pin A4
AdcaRegs.ADCSOC0CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure the post processing block (PPB) to eliminate subtraction related calculation
AdcaRegs.ADCPPB1CONFIG.bit.CONFIG = 0; // PPB is associated with SOC0
AdcaRegs.ADCPPB1OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// Shunt Motor Currents (SW) @ B4
// ********************************
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 4; // SOC0 will convert pin B4
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdcbRegs.ADCPPB1CONFIG.bit.CONFIG = 0; // PPB is associated with SOC0
AdcbRegs.ADCPPB1OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// Resolver Fbk - Cosine @ C1
// ********************************
AdccRegs.ADCSOC0CTL.bit.CHSEL = 15; // SOC0 will convert pin C15
AdccRegs.ADCSOC0CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdccRegs.ADCSOC0CTL.bit.TRIGSEL = 15; // trigger on ePWM6 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdccRegs.ADCPPB1CONFIG.bit.CONFIG = 0; // PPB is associated with SOC0
AdccRegs.ADCPPB1OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// Resolver Fbk - sine @ D1
// ********************************
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 1; // SOC0 will convert pin D1
AdcdRegs.ADCSOC0CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcdRegs.ADCSOC0CTL.bit.TRIGSEL = 15; // trigger on ePWM6 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdcdRegs.ADCPPB1CONFIG.bit.CONFIG = 0; // PPB is associated with SOC0
AdcdRegs.ADCPPB1OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// LEM motor current LEM-V @ at A2
// ********************************
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 2; // SOC1 will convert pin A2
AdcaRegs.ADCSOC1CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdcaRegs.ADCPPB2CONFIG.bit.CONFIG = 1; // PPB is associated with SOC1
AdcaRegs.ADCPPB2OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// LEM motor current LEM-W @ at B2
// ********************************
AdcbRegs.ADCSOC1CTL.bit.CHSEL = 2; // SOC0 will convert pin B2
AdcbRegs.ADCSOC1CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdcbRegs.ADCPPB2CONFIG.bit.CONFIG = 1; // PPB is associated with SOC1
AdcbRegs.ADCPPB2OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// Phase Voltage sense, A3 SOC2 ADCA, Vfb-V
// ********************************
AdcaRegs.ADCSOC2CTL.bit.CHSEL = 3; // SOC2 will convert pin A3,
AdcaRegs.ADCSOC2CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdcaRegs.ADCPPB3CONFIG.bit.CONFIG = 1; // PPB is associated with SOC1
AdcaRegs.ADCPPB3OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

//B3, Vfb-W
// ********************************
AdcbRegs.ADCSOC2CTL.bit.CHSEL = 3; // SOC2 will convert pin B3
AdcbRegs.ADCSOC2CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdcbRegs.ADCPPB3CONFIG.bit.CONFIG = 1; // PPB is associated with SOC1
AdcbRegs.ADCPPB3OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

//C3, Vfb-U
// ********************************
AdccRegs.ADCSOC2CTL.bit.CHSEL = 3; // SOC2 will convert pin C3
AdccRegs.ADCSOC2CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdccRegs.ADCSOC2CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C
// Configure PPB to eliminate subtraction related calculation
AdccRegs.ADCPPB2CONFIG.bit.CONFIG = 1; // PPB is associated with SOC1
AdccRegs.ADCPPB2OFFCAL.bit.OFFCAL = 0; // Write zero to this for now till offset ISR is run

// Bus Voltage Feedback at B0 (not used)
AdcbRegs.ADCSOC2CTL.bit.CHSEL = 0; // SOC0 will convert pin A5
AdcbRegs.ADCSOC2CTL.bit.ACQPS = 30; // sample window in SYSCLK cycles
AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 5; // trigger on ePWM1 SOCA/C