• State Resolved
  • Locked Locked
  • Replies 7 replies
  • Subscribers 82 subscribers
  • Views 1434 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

using internal ADC and DMA in different modes @ TMS320F28335

MANIDEEP A
Prodigy 90 points

Other Parts Discussed in Thread: TMS320F28335

Hi everyone,

          I'm working on TMS320F28335 for control system application. In my project it is required to use the peripherals configuring differently in different modes Built_In_test (BIT) mode and Operational (OP) mode. On booting, first Built in tests are performed and then on receiving the command it has to switch to operational mode which i declared as a separate function.

         In BIT mode, I'm checking the peripherals ADC, SCI, SPI, memory.  I'm using ISR for internal ADC on EOS for checking the converted data. At last  SCI and ADC are reset.

        In OP mode, first I configure and initialize all the peripherals and ISRs once again. Here I'm using ADC, Timer, DMA. The timer raises interrupt for every 200 microsec and on interrupt SOC is given to ADC. Here on EOS, DMA transfer happens. After the transfer is over, the data is processed and SCI is used for comm. Here I'm using different variable counts for each peripherals

 I observed the following cases:

1) Using ADC in BIT mode and without using DMA in OP mode, it's working fine

2) without ADC in BIT mode and without  DMA in OP mode, it's working fine

3) using ADC in BIT and without DMA in OP mode, on reloading program different times, each time it is showing different case( timer count goes for 33 and stops, illegal ISR, timer count shows greater than the ADC count...)

4) using ADC in BIT and DMA in OP, it is not running even for one time showing illegal ISR

kindly help me in this issue

  • 0
    TI__Guru 60865 points

    Hi Manideep,

    Does the BIST mode run continuously until the command to switch to OP mode arrives?  My guess is that during BIST operation something gets set in the ADC configurations that isn't getting properly cleared once the device switches to OP mode.  You may want to confirm before the switch happens:

    • The trigger source to the ADC is disabled
    • The ADC is allowed to complete any pending conversions
    • Any pending ISR is allowed to complete, and then the ISR is disabled through the PIE
    • Wait, and do a final check that all ADC and PIE flags are clear

    If you want, you can also completely reset the ADC module when switching between BIST mode and OP mode.  In this case you may need to ensure that the device calibration function is re-run to reload the ADC trims into the trim registers.

  • 0 in reply to Devin Cottier
    Prodigy 90 points

    Hi Devin Cottier,

     Many thanks for your suggestions, I tried but in vain. The functions are working fine individually, the problem happens when I'm combing the both. Here I'm attaching a word file of snapshots of my code kindly help me and thanks in advanceTI_doubts.docx

  • 0 in reply to MANIDEEP A
    TI__Guru 60865 points

    Hi Manideep,

    Based on the ADC module user's guide (http://www.ti.com/lit/ug/spru812a/spru812a.pdf, I think you need some delay after you issue an ADC reset:

    "Also, the reset of ADC has a latency of two clock cycles (that is, other ADC control register bits should not be modified until two ADC clock cycles after the instruction that resets the ADC."

    If resetting the ADC between modes is not helping, you may want to look at the configurations for other peripherals that you are using (PIE, CPU timer, SCI, SPI, and DMA).  You should check all the registers you are configuring and see if there is any difference between test mode and test mode + operational mode.  

  • 0 in reply to Devin Cottier
    Prodigy 90 points

    Hi Devin Cottier,

       For configuring the DMA as software event triggered, what should be the PERINTSEL given, is it 0 or some other?

  • 0 in reply to MANIDEEP A
    TI__Guru 60865 points

    Hi Manideep,

    Yeah, I think this is how you should configure it:

  • 0 in reply to Devin Cottier
    Prodigy 90 points
    Hi Devin Cottier,
    Many thanks for your suggestions, my problem is solved. In the memory test I gave the starting address: 0xA000 since I'm forcibly writing those locations with the pattern defined by me for memory testing and as those are required for some other purpose , it is causing problem. So I changed the address and now its working fine
  • 0 in reply to MANIDEEP A
    TI__Guru 60865 points
    Hi Manideep,

    Great to hear you now have it working!