TMS320F28069M: SCI-B RX-interrupt does not trigger (SCI-A works)

#include "main.h"     // Device Headerfile and Examples Include File

#include "sw/drivers/gpio/src/32b/f28x/f2806x/gpio.h"
#include "sw/drivers/sci/src/32b/f28x/f2806x/sci.h"
#include "sw/drivers/clk/src/32b/f28x/f2806x/clk.h"
#include "sw/drivers/pie/src/32b/f28x/f2806x/pie.h"
#include "sw/drivers/wdog/src/32b/f28x/f2806x/wdog.h"
#include "sw/drivers/cpu/src/32b/f28x/f2806x/cpu.h"
#include "sw/drivers/pll/src/32b/f28x/f2806x/pll.h"

// Prototype statements for functions found within this file.
interrupt void sciaRxFifoIsr(void);
void scia_init(void);
void scia_fifo_init(void);

// Global variables
uint16_t rdataA;    // Received data for SCI-A

CLK_Handle myClk;
GPIO_Handle myGpio;
PIE_Handle myPie;
SCI_Handle mySci;

void main(void)
{
    uint16_t i;

    CPU_Handle myCpu;
    PLL_Handle myPll;
    WDOG_Handle myWDog;

    // Initialize all the handles needed for this application
    myClk = CLK_init((void *)CLK_BASE_ADDR, sizeof(CLK_Obj));
    myCpu = CPU_init((void *)NULL, sizeof(CPU_Obj));
    myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
    myPie = PIE_init((void *)PIE_BASE_ADDR, sizeof(PIE_Obj));
    myPll = PLL_init((void *)PLL_BASE_ADDR, sizeof(PLL_Obj));
//    mySci = SCI_init((void *)SCIA_BASE_ADDR, sizeof(SCI_Obj));
    mySci = SCI_init((void *)SCIB_BASE_ADDR, sizeof(SCI_Obj));
    myWDog = WDOG_init((void *)WDOG_BASE_ADDR, sizeof(WDOG_Obj));

    // Perform basic system initialization
    WDOG_disable(myWDog);
    (*Device_cal)();

    //Select the internal oscillator 1 as the clock source
    CLK_setOscSrc(myClk, CLK_OscSrc_Internal);

    // Setup the PLL for x10 /2 which will yield 50Mhz = 10Mhz * 10 / 2
    PLL_setClkFreq(myPll, PLL_ClkFreq_90_MHz);

    // Disable the PIE and all interrupts
    PIE_disable(myPie);
    PIE_disableAllInts(myPie);
    CPU_disableGlobalInts(myCpu);
    CPU_clearIntFlags(myCpu);

    // If running from flash copy RAM only functions to RAM
#ifdef _FLASH
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif


    // Initalize GPIO
//    GPIO_setPullup(myGpio, GPIO_Number_28, GPIO_Pullup_Enable);
//    GPIO_setPullup(myGpio, GPIO_Number_29, GPIO_Pullup_Disable);
//    GPIO_setQualification(myGpio, GPIO_Number_28, GPIO_Qual_ASync);
//    GPIO_setMode(myGpio, GPIO_Number_28, GPIO_28_Mode_SCIRXDA);
//    GPIO_setMode(myGpio, GPIO_Number_29, GPIO_29_Mode_SCITXDA);

    GPIO_setPullup(myGpio, GPIO_Number_15, GPIO_Pullup_Enable);
    GPIO_setPullup(myGpio, GPIO_Number_58, GPIO_Pullup_Disable);
    GPIO_setQualification(myGpio, GPIO_Number_15, GPIO_Qual_ASync);
    GPIO_setMode(myGpio, GPIO_Number_15, GPIO_15_Mode_SCIRXDB);
    GPIO_setMode(myGpio, GPIO_Number_58, GPIO_58_Mode_SCITXDB);

    // Setup a debug vector table and enable the PIE
    PIE_enable(myPie);

    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
        EALLOW;    // This is needed to write to EALLOW protected registers
//        ((PIE_Obj *)myPie)->SCIRXINTA = &sciaRxFifoIsr;
        ((PIE_Obj *)myPie)->SCIRXINTB = &sciaRxFifoIsr;
        EDIS;   // This is needed to disable write to EALLOW protected registers

        // Register interrupt handlers in the PIE vector table
//        PIE_registerPieIntHandler(myPie, PIE_GroupNumber_9, PIE_SubGroupNumber_1, &sciaRxFifoIsr);
        PIE_registerPieIntHandler(myPie, PIE_GroupNumber_9, PIE_SubGroupNumber_3, &sciaRxFifoIsr);

        scia_init();        // Init SCI-A
        scia_fifo_init();   // Init SCI-A Fifos

        // Enable interrupts required for this example
//        PIE_enableInt(myPie, PIE_GroupNumber_9, PIE_InterruptSource_SCIARX);
        PIE_enableInt(myPie, PIE_GroupNumber_9, PIE_InterruptSource_SCIBRX);

        CPU_enableInt(myCpu, CPU_IntNumber_9);
        CPU_enableGlobalInts(myCpu);

	for(;;)
	{} // end of for(;;) loop

}

interrupt void sciaRxFifoIsr(void)
{
    // Read data
    rdataA = SCI_read(mySci);

    // Clear Overflow flag
    SCI_clearRxFifoOvf(mySci);

    // Clear Interrupt flag
    SCI_clearRxFifoInt(mySci);

    // Issue PIE ack
    PIE_clearInt(myPie, PIE_GroupNumber_9);

    return;
}

void scia_init()
{

//    CLK_enableSciaClock(myClk);
    CLK_enableScibClock(myClk);

    // 1 stop bit,  No loopback
    // No parity,8 char bits,
    // async mode, idle-line protocol
    SCI_disableParity(mySci);
    SCI_setNumStopBits(mySci, SCI_NumStopBits_One);
    SCI_setCharLength(mySci, SCI_CharLength_8_Bits);

    // enable TX, RX, internal SCICLK,
    // Disable RX ERR, SLEEP, TXWAKE
    SCI_enableTx(mySci);
    SCI_enableRx(mySci);
    SCI_enableTxInt(mySci);
    SCI_enableRxInt(mySci);

    SCI_setBaudRate(mySci, (SCI_BaudRate_e)292);

    SCI_enable(mySci);

    return;
}

void scia_fifo_init()
{
    SCI_enableTxFifoEnh(mySci);
    SCI_resetTxFifo(mySci);
    SCI_clearTxFifoInt(mySci);
    SCI_resetChannels(mySci);
    SCI_setTxFifoIntLevel(mySci, SCI_FifoLevel_1_Word);
    SCI_enableTxFifoInt(mySci);

    SCI_enableRxFifo(mySci);
    SCI_resetRxFifo(mySci);
    SCI_clearRxFifoInt(mySci);
    SCI_setRxFifoIntLevel(mySci, SCI_FifoLevel_1_Word);
    SCI_enableRxFifoInt(mySci);

    return;
}