This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software: TI C/C++ Compiler
Hi,
Customer is using compiler 5.2.11 For TMS320F28335, level 2 optimization.
After compiling, they found that instruction RPT was created, when left "Specify max number of repetitions in a RPT instructions" empty or set as 0. If other values were set, RPT was not created in ASM.
Two questions:
1) Why it happened as before;
2) During RPT, interrupt will be disabled; besides RPT, is there any other instruction, which can disable interrupt during its executing?
Thanks a lot.
Br, Jordan
Hi Jordan,
My understanding is that the RPT instruction is uninterruptable because it's treated like a single instruction and the CPU will complete code execution of the current instruction before it saves the context and fetches the interrupt vector. You could see similar behavior with other instructions that take multiple cycles like branches.
Whitney
Hi Jordan,
This also applies to other instructions that take multiple cycles. Branch instructions are one example. You can refer to the CPU and instruction set reference guide for cycle counts for all instructions.
Whitney
Whitney,
Sorry, I made you confused. Actually I'd like to know, if there are some other instructions, which cost a lot of CPU cycles.
Customer's issue is, after setting optimization level 2, RPT was generated. The repeat time is large like 100 times. During the 100 times RPT execution, ADC interrupt can't be serviced in time. This destroyed the PWM frequency.
Normal instruction cycles are not a problem for them.
Thanks a lot.
Br, Jordan
Hi Jordan,
Okay, I understand. No, RPT is the only one with the potential to take up such a large number of cycles without being interrupted.
Whitney