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TMS320F280049M: F280049 EPWM CLK Source and divider

Joe Zhu
Intellectual 2540 points

Part Number: TMS320F280049M

Hi Champion,

F280049 EPWM input clock in TRM page1492, Figure 15-5 say it has a ClkCfgRegs.PERCLKDIVSEL[EPWMCLKDIV] register which can divide PWM clk ahead for SYSCLK, but I cannot find this register in CLIK_CFG_REGS in page162, Table2-38, and also in page91l, figure 2-3 clock soure do not have thie divider.

Do you know whether we have this divider? Or f280049 sames ad F28069, get PWM CLK direct to SYSCLK?

Thanks!

BR

Joe

  • 0
    TI__Guru** 113745 points
    Hi Joe,

    On this device by default PWM CLK is connected to SYSCLK (like F28069) so you don't have to configure any divider. We'll check the documentation and make appropriate correction in next version.

    Regards,
    Vivek Singh