LAUNCHXL-F28379D: Problem with ADCIN A2/A3/A4 + documentation

I'm using the analog inputs A2, A3, A4 and A5 from the LauncXL-F28379D, for convenience all of them are connected to GND over an 1 kΩ resistor. All inputs are configured as an 16 bit input.
Now there are 3 different situations.

A5: Works fine, with voltages from 0 V up to 3.3 V.

A3+A4: The voltage at ADCIN is GND, but the result register contains 65510 ... 65535, mostly 65535. Another voltage will change nothing.

A2: The output of the OPAMP is 0 V (OK), at the ADCIN there is 3.0 V (not 3.3 V). The AscResult says 0 ... ~20. Another voltage will change nothing.
If I disconnect the LauncXL completely from my board, the voltage falls to 0 V (µC and my board). If i only disconnect te connection to the OPAMP, then at the ADCIN there are still 3.0 V.
The LaunchXL User's Guide shows that there is only a connection to the µC. That means the 3.0 V comes from the µC. But it is inconsistent at this point. For U16 there is written "ADCINA2/CMPIN1P" (input only), the signal name is "ADCINA2/ANALOGIN" (input only), but at J3 it's "Analog Out/I2S DO" (output!).

Thanks for help!

Edit: The reason was 16 bit while using single mode und the usage uf ADC A2.

Here is the configuration of the ADCA:

EALLOW;
EPwm9Regs.TBPRD = 2603;
EPwm9Regs.TBCTR = 0;
EPwm9Regs.TBCTL.bit.HSPCLKDIV = 0;
EPwm9Regs.TBCTL.bit.CLKDIV = 0;

EPwm9Regs.ETSEL.bit.SOCAEN = 1;
EPwm9Regs.ETSEL.bit.SOCASEL = 1;
EPwm9Regs.ETPS.bit.SOCAPRD = 1;

PieVectTable.ADCA1_INT = &adca_isr;
AdcaRegs.ADCCTL2.bit.PRESCALE = 2;
AdcSetMode(0, 1, 0);
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;

DELAY_US(1000);

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 1;
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

AdcaRegs.ADCSOC0CTL.bit.CHSEL 	= 3;	
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 21;
AdcaRegs.ADCSOC0CTL.bit.ACQPS 	= 511;

AdcaRegs.ADCSOC1CTL.bit.CHSEL 	= 2;
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 21;
AdcaRegs.ADCSOC1CTL.bit.ACQPS 	= 511;

AdcaRegs.ADCSOC2CTL.bit.CHSEL 	= 4;
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 21;
AdcaRegs.ADCSOC2CTL.bit.ACQPS 	= 511;

AdcaRegs.ADCSOC3CTL.bit.CHSEL 	= 5;
AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = 21;
AdcaRegs.ADCSOC3CTL.bit.ACQPS 	= 511;

EPwm9Regs.TBCTL.bit.CTRMODE = 0;

EDIS;

PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
IER |= M_INT1;