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CCS/TMS320F28377D: SPI usage in CLA1

Tjarco Boerkoel
Expert 1725 points
Part Number: TMS320F28377D

Tool/software: Code Composer Studio

Hi All,

I try to set up the CLA as a multipurpose communication layer.

For this I need to have access to multiple SPI registers.

I'm able to read and write to and from the TX and RX Fifos and trigger tasks by Rx and Tx events.

Thing is, I'll be needing to (re)configure the SPI configuration from the CLA. Am I able to (re) configure the SpiaRegs data from CLA code on a TMS320F28337D?

The datasheet says that configuration (in general) can be done by using the allow bit, but I'm not able to write to (for example) the fifo interupt levels.

>>Datasheet is incomplete regarding the cla<<

Best regards,

Tjarco

  • 0
    TI__Mastermind 32995 points
    CLA has access to shared peripherals and is able to configure SPI module.

    I do not think the SPI requires MEALLOW. CLA writes should work without MEALLOW.

    sal
  • 0 in reply to Sal Pezzino
    TI__Mastermind 32995 points
    You will need to give master access to CLA for that SPI instance though.

    sal
  • 0 in reply to Sal Pezzino
    Expert 1725 points

    Hi,

    Thanks for the reactions. I've set the CLA as 2nd master in SECMSEL and the SPI pheripheral is assigned to CPU1 (DevCfgRegs.CPUSEL6.bit.SPI_n).

    I don;t find any more Master Select registerss.

    I've created some debug code in the CLA events which I trigger from CPU1 code :

    __meallow();			//CLA enables its own interrupt to Tx data autonomous
SpiaRegs.SPIFFRX.bit.RXFFST = CLA1toCPU1.RxEvnt;
CLA1toCPU1.RxEvnt++;

    I can see the RxEvnt count, AND I see the RXFFIL count. So for now, solved.

    >> I notice that the compiler sometimes crashes which breaks down all following builds. Could be the case for this issue.

    Best regards,

  • 0 in reply to Tjarco Boerkoel
    TI__Mastermind 32995 points
    Please verify my above response to close the thread.
    sal