TMS320F28377D: TMS320F28377D programming failed

Honle,

I am having trouble understanding your question - could please clarify/provide more information

Thanks,
PEter

Dear,Peter

As you know, DSP power supply includes 3.3v and 1.2v, when the programming code is programmed, found 1.2V into 1.8V, when the disconnect DSP, 1.2V power is normal, DSP to 1.2v pulled up to the 1.8V, DSP can not download the program again
Do you understand?

Thanks
Honle

Honle,

Let me first re-state your question to make sure that I understand correctly. Your board is providing 3.3V and 1.2V power to the DSP. When you turn on the power the VDDIO reads 3.3V and VDD reads 1.2V. But after the program is loaded using JTAG and when it starts executing the VDD power goes from 1.2V to 1.8V. Has this board ever ran correctly, or is this a new board and you are running it for the first time? At this time I suspect you may have a short circuit somewhere on you board between VDD and VDDIO. Just to clarify - the jump from 1.2V to 1.8V happens only when you load/execute code using JTAG, or does it happen when you power-up the board or plug in the JTAG cable?

Hi，Peter

For your understanding of the problem is right, your analysis error, I use the same method to download a total of 40 boards, 2 pcs of the problem, when I re-replace the DSP, will become normal, I can not understand the DSP is broken or where I Use a problem,
do you understand what I mean? My English is not good, sorry

Dear，Peter

Are there new suggestions? Project is urgent，thanks

Honle,

I still don't understand completely - someone from TI will be contacting you shortly to help me better translate your question into English.

Regards,
Peter

Dear，Peter

I once again describe the problem
Conditions: the same code to download 40PCS DSP(28377d), 2pcs dsp have problems,38 psc dsp is ok.
Phenomenon: If you do not download the code, VDD1.2V, VDDIO3.3V
           After downloading the code, VDD is pulled up to 1.8V by DSP, DSP can not download the code again, if the replacement of the new DSP, the problem is solved.
thanks!

Honle,

Now I understand better. Regarding the code that triggers the 1.8V fault, can you describe what is this code doing?

Regards,
Peter

Dear，Peter

Just used to do the UART test

Honle

Honle,

At which point during the UART test does the VDD go up to 1.8. Is during the time when the code is being downloaded, or does it happen during the time when the code is executing? One observation - if this is a 100-pin package or 176-pin package then there is only one path to ground through the PowerPad in the center of the chip. If the connection to that ground is bad or marginal, it may be possible to see the VDD voltage to go up during program execution when the DSP is consuming more power. Conversely, just after power-up, the DSP is not using much power, so the VDD may appear normal. Here is a link that has some general information about mixed signal grounding -

www.analog.com/.../staying-well-grounded.html

Regards,
PEter

Hello, is it possible that you give me your phone number so that I can directly talk to you in Chinese? my Email is : howard-zou@ti.com

Honle,

Here is my current understanding of your problem:

1. When VREGENZ is pulled to 3.3V the emulator doesn’t work. One reason for that could be that the VDDIO level is below VDDIO min and the device is in the internal reset state. Question – please take a look at the XRSn pin to make sure the device is not in reset. If the XRSn pin is low, that indicates internal reset state. The reset state could be caused by VDDIO being less than VDDIO min (3.1V). Please take a look at this first – per datasheet for this device the VREGENZ should be connected to VDDIO and the emulator should work.

2. When VREGENZ is not driven then the internal pulldown enables the internal VREG – this VREG should output 1.2V. My understanding is that at that point the emulator connects, but when you start code execution the device becomes damaged and has to be replaced. Is that correct? This could be because that when the DSP is not executing code it is using very little current. But when execution starts, the current is increased and the higher than permitted voltage (1.8V) may be damaging the DSP. This condition (where VREGENZ is not driven high) is not permitted by the datasheet and should not be tried on this dual core device.

Regards,
Peter