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Tool/software: Code Composer Studio
Hello guys,
I am using EVAL KIT FOR TMS320F28X. I am trying to implement PWM+ADC in my development board. ADC pins are not working on my development board. PWM is working on same development board.
My code:
//Configure ADC
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; // ADC
AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; // Use internal bandgap
AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; // Power up band gap
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; // Power up reference
AdcRegs.ADCCTL1.bit.ADCPWDN = 1; // Power up rest of ADC
AdcRegs.ADCCTL1.bit.ADCENABLE = 1; // Enable ADC
AdcRegs.ADCCTL2.bit.ADCNONOVERLAP = 1; // OVERLAPPING of sample is not allowed
for (i = 0; i < 5000; i++)
{
} // wait 60000 cycles = 1ms (each iteration is 12 cycles)
AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; // create int pulses 1 cycle prior to output latch
//set S/H window to 6 clk cycles (112.5ns)
AdcRegs.ADCSOC0CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC1CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC2CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC4CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC5CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC6CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC9CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC8CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC10CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC12CTL.bit.ACQPS = 8;
AdcRegs.ADCSOC14CTL.bit.ACQPS = 8;
//AdcRegs.INTSEL1N2.bit.INT1SEL = 12; // ADCCH12 (ADC-B4) EOC causes ADCInterrupt 1
// AdcRegs.INTSEL1N2.bit.INT1CONT = 1; // set ADCInterrupt 1 to auto clr
AdcRegs.INTSEL1N2.bit.INT1E = 0; // disable ADC interrupt
//Note that SOC3, 7, 11, 13 & 15 are valid, but these SOCs are not configured
//since these ADC outputs do not exist on the controlSTICK. The configuration
//is configured as it is for readability.
//EOC = end of conversion event; SOC = start of conversion event
AdcRegs.ADCINTSOCSEL1.bit.SOC0 = 0; // NO ADC intrrupt selected 1 causes SOC0
AdcRegs.ADCINTSOCSEL1.bit.SOC1 = 0;
AdcRegs.ADCINTSOCSEL1.bit.SOC2 = 0;
AdcRegs.ADCINTSOCSEL1.bit.SOC4 = 0;
AdcRegs.ADCINTSOCSEL1.bit.SOC5 = 0;
AdcRegs.ADCINTSOCSEL1.bit.SOC6 = 0;
AdcRegs.ADCINTSOCSEL2.bit.SOC8 = 0;
AdcRegs.ADCINTSOCSEL2.bit.SOC9 = 0;
AdcRegs.ADCINTSOCSEL2.bit.SOC10 = 0;
AdcRegs.ADCINTSOCSEL2.bit.SOC12 = 0;
AdcRegs.ADCINTSOCSEL2.bit.SOC14 = 0;
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 1; // ADC intrrupt is selected by CPU timer0
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC8CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC9CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC10CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC12CTL.bit.TRIGSEL = 1;
AdcRegs.ADCSOC14CTL.bit.TRIGSEL = 1;
//Select the channel to be converted when SOCx is received
AdcRegs.ADCSOC0CTL.bit.CHSEL = 0; // convert ADC-A0 (CH0) when SOC0 is received
AdcRegs.ADCSOC1CTL.bit.CHSEL = 1; // convert ADC-A1 (CH1) when SOC1 is received
AdcRegs.ADCSOC2CTL.bit.CHSEL = 2;
AdcRegs.ADCSOC4CTL.bit.CHSEL = 4;
AdcRegs.ADCSOC5CTL.bit.CHSEL = 5;
AdcRegs.ADCSOC6CTL.bit.CHSEL = 6;
AdcRegs.ADCSOC8CTL.bit.CHSEL = 8;
AdcRegs.ADCSOC9CTL.bit.CHSEL = 9; // convert ADC-B1 (CH9) when SOC9 is received
AdcRegs.ADCSOC10CTL.bit.CHSEL = 10;
AdcRegs.ADCSOC12CTL.bit.CHSEL = 12;
AdcRegs.ADCSOC14CTL.bit.CHSEL = 14;
EDIS;
Can you guys please help me out here?
Regards,
Ranjit Chennamchetty
Tommy,
I am really beginner to this microcontroller. How can I change the executing the program from Flash to RAM and Vice Versa?
This is my .cmd file.
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000050, length = 0x0003B0
RAML0_L3 : origin = 0x008000, length = 0x002000 /* RAML0-3 combined for size of .text */
/* in Example_F2806xSWPrioritezedInterrupts */
RESET : origin = 0x3FFFC0, length = 0x000002
FPUTABLES : origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */
IQTABLES : origin = 0x3FDF00, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEA50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
BOOTROM : origin = 0x3FF3B0, length = 0x000C10
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */
RAML5 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L5 */
RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */
RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */
RAML8 : origin = 0x012000, length = 0x002000 /* on-chip RAM block L8 */
USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */
}
SECTIONS
{
/* Setup for "boot to SARAM" mode:
The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart : > BEGIN, PAGE = 0
ramfuncs : > RAMM0, PAGE = 0
.text : > RAML0_L3, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
.ebss : > RAML4, PAGE = 1
.econst : > RAML4, PAGE = 1
.esysmem : > RAML4, PAGE = 1
IQmath : > RAML0_L3, PAGE = 0
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
/* Allocate FPU math areas: */
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
DMARAML5 : > RAML5, PAGE = 1
DMARAML6 : > RAML6, PAGE = 1
DMARAML7 : > RAML7, PAGE = 1
DMARAML8 : > RAML8, PAGE = 1
/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)
}
*/
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
- Ranjit
Ranjit,
It looks to me like you are running out of RAM. The simple way to tell with ControlSUITE examples is that "_RAM" is in the name of the .CMD file for executing out of RAM. Another way is to compare the "origin" address locations in the .CMD file against the memory map locations in the datasheet.
The common way to switch from RAM to FLASH is to:
-Tommy