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The Concerto F28M36x Technical Reference Manual (SPRUHE8D October 2012–Revised November 2016) on page 777 lists in Figure 7-88 and Table 7-38 in the Counter-Compare Control Register (CMPCTL2) fields LOADCSYNC (bits 11-10) and LOADDSYNC (bits 13-12).
The headers includes in the support libraries (version V210) file "F28M36x_Epwm.h" does not include these fields.
Which is correct? Does the manual list fields that do not exist? Or is the library header missing these fields?
Struct as in F28M36x_Epwm.h (V210)
struct CMPCTL2_BITS { // bits description
Uint16 LOADCMODE : 2; // 1:0 Active Compare C Load
Uint16 LOADDMODE : 2; // 3:2 Active Compare D load
Uint16 SHDWCMODE : 1; // 4 Compare C Block Operating Mode
Uint16 rsvd1 : 1; // 5 Reserved
Uint16 SHDWDMODE : 1; // 6 Compare D Block Operating Mode
Uint16 rsvd2 : 9; // 15:7 Reserved
};Struct modified to match documetnation
struct CMPCTL2_BITS { // bits description
Uint16 LOADCMODE : 2; // 1:0 Active Compare C Load
Uint16 LOADDMODE : 2; // 3:2 Active Compare D load
Uint16 SHDWCMODE : 1; // 4 Compare C Block Operating Mode
Uint16 rsvd1 : 1; // 5 Reserved
Uint16 SHDWDMODE : 1; // 6 Compare D Block Operating Mode
Uint16 rsvd2 : 3; // 9:7 Reserved
Uint16 LOADCSYNC : 2; // 11:10 Shadow to Active CMPC Register
// Load on SYNC event
Uint16 LOADDSYNC : 2; // 13:12 Shadow to Active CMPD Register
// Load on SYNC event
Uint16 rsvd3 : 2; // 15:14 Reserved
};
