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HRPWM jittering when synchronization enabled between two channels

Expert 2710 points

I have configured the 2 HRPWM A channels for high resolution period mode (I try to control the frequency keeping 50% pulse width). The channels are in sync and no jittering. But If I want to be sure that these two channels will be synced and enable the sync out from unit ePWM1 (CTR=ZRO) then there will jittering among the channels. If I use up count mode the jittering between channels is 1Tick=~17ns and if I use up-down count mode the jittering is 2Ticks. It seems so that the other channel looses it's high resolution mode when synchronizing from other ePWM unit, because the jitter is in Ticks and not in high resolution ticks (160ps or so). According to HRPWM manual if MEP controls the period it should be possible to control the phase and edge also, so this sync should work, right?

  • Anyone?

     

    Update: After configuring the PWM channels there is no jittering but as soon as I change the frequency (update new value to timeperiod registers for both channels) the jittering starts. And while PWMs are running I change the SYNCOSEL bit from 1 to 3 (from CTR = 0 to disable) the jittering stops. It still looks like the highresolution is gone from the slace channel. At least the high resolution period.

    Edit: After changing values I will keep everything constant (Period and cmpa for both channels same values) so nothing should change at the pwm units but there is still jitter.

    Edit2: PWMs will jitter after proper high resolution initilization meaning if I really put some "fractional" values to period and cmpahr. So this is a feature and there is nothing I can do, or?

  • Can't you help me with this? This is really urgent.

  • JHi -

    This is actually a limitation of the HRPWM module and the HRPWM guide is in the middle of being updated with the below note:

    Note:

    When high-resolution period mode is enabled, an EPWMxSYNC pulse will introduce  +/- 1 - 2 cycle jitter to the PWM ( +/- 1 cycle in up-count mode and +/- 2 cycle in up-down count mode). For this reason, TBCTL[SYNCOSEL] should not be set to 1 (CTR = 0 is EPWMxSYNCO source) or 2 (CTR = CMPB is EPWMxSYNCO source). Otherwise, the jitter will occur on every PWM cycle with the synchronization pulse.  

    When TBCTL[SYNCOSEL] = 0 (EPWMxSYNCI is EPWMxSYNCO source), a software synchronization pulse should be issued only once during high-resolution period initialization. If a software sync pulse is applied while the PWM is running, the jitter will appear on the PWM output at the time of the sync pulse.

  • If I synchronize the channels only once with the software is it guaranteed that the channels will be on sync even if I change TBPRDHR (I will change the frequency for all 4 channels I need at the same time. duty cycle is always 50%)? This synchronization is very critical and frequency change is done on every cycle.

  • JHi -

    If you do not change the frequency, and software sync only once, then yes, all channels will remain in sync.

    Unfortunately, if you do change  frequency at all, the jitter can return.