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CCS/TMS320F28027F: Internal Reference Vref???

Andrew Buckin
Expert 2070 points
Part Number: TMS320F28027F
Other Parts Discussed in Thread: REF2033, REF2030

Tool/software: Code Composer Studio

what is the accuracy Vref? Vref = VDD or is it Reference?  In many examples, for 1.65V  is used VDD/2.

Thank you.

Andrew.

  • 0
    TI__Guru* 77190 points

    Andrew,

    The ideal internal VREF would give a Full Scale Range (FSR) of 0V - 3.3V; that is why the examples are referring to the 1.65V figure as 1/2 of the FSR.

    However, from device to device and over the full operating range of a device there will be gain and offset errors to the ideal range as shown here: http://www.ti.com/product/TMS320F28027/datasheet/detailed-description#litSPRS230-0491 .

    Finally, this is not dependent on the VDDIO or VDDA voltage to the F28027, but rather created by an internal band gap reference that does not have a direct relationship to the supply rails.

    There is an option, using VREFHI pin, to supply an external reference; in which case you could have something that moved with the VDDIO/VDDA if that was the desired behaivor.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Expert 2070 points

    Thank you, But, what will VREFHI look like if the power supply of the CPU is 3.2V or so?

  • 0 in reply to Andrew Buckin
    TI__Guru* 77190 points

    Andrew,

    Across the operating range of the device, the internal VREF will try to maintain a FSR of 0 - 3.3V.  So, even while the external supply moves, the FSR should be considered "unchanged".  The deviation from ideal that I mentioned in the previous post is largely due to temperature drift of the internal bandgap, rather than influence of the external rail moving.  

    A few things I forgot to mention wrt this:

    1)With the ADC on this device, the internal VREF does not come out to a pin for observation.  

    2)On all F2802x packages/pinouts VREFHI is ganged with ADCINA0.  So if you want to use VREFHI to input an external reference then you lose an ADC input.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Expert 2070 points

    I do not quite understand how TI gets 3.3V from 3.2V? :)

    Use the VDD/2 for the middle point 1.65V is not a nice approach.

    I think that for the next motor Controller.  I will use REF2033 or REF2030

    Andrew.

  • 0 in reply to Andrew Buckin
    TI__Guru* 77190 points
    Andrew,
    Thanks for the feedback, I think I understand your point, i.e. it would be beneficial for you if the internal VREF moved with VDDA, such that VDDA/2 would always give 2048 when converted.

    As I mentioned, if a ratio-metric type ADC is needed then the use of the VREF is the way to go. The internal reference is by design intended to give 0-3.3V range no matter the VDDA rail so long as it is in specification.

    I agree that if you need a stable 1/2 FSR source that the reference you mention is good since it gives the 3.3V for the VREFHI and the 1.65 as well.

    I'm commenting on the functional operation of the device, if there is something I'm missing in terms of a system need for 1.65V (or half FSR)for motor control I can certainly get some more eyes on this from our motor experts to see if we can help close this out in a better way for you.

    Best,
    Matthew
  • 0 in reply to Andrew Buckin
    TI__Genius 17175 points
    Andrew,

    Please take a look at this post: e2e.ti.com/.../675150

    The internal bandgap reference is independent of VDDA within the normal operating range. Instead, you take a performance hit when the ADC input voltage is above VDDA when it falls beneath the upper bound of the bandgap reference (3.3V)

    Sean
  • 0 in reply to MatthewPate
    Expert 2070 points

    For example. I make the controller 50A. Worst Case scenario. VDDA 3.2V, Gain 33, Rshunt 0.001. for the current amplifier VDDA / 2 = 1.6V. The current measurement is -48.48A-51.51A. :( . The maximum I can use the controller is only up to ~ 48A. :( To ensure 50A I need to reduce the gain to 30.
    USER_IQ_FULL_SCALE_CURRENT_A (52.0)
    USER_ADC_FULL_SCALE_CURRENT_A (110.0)
    I_A_offset (1.666)

    it's a pity! that the TI does not describe the internal bandgap. I would not have a stupid question. :) I will do both versions with REF2033 or REF2030 and VDDA/2 and then decide what to leave.

    Best,
    Andrew

  • 0 in reply to Andrew Buckin
    TI__Guru* 77190 points
    Andrew,
    One point wrt the REF2033/REF2030, they are also designed to give a constant output voltage no matter their supply movement. In this regard they are going to look alot like the internal reference of the MCU when VDDA moves, although with a lower drift co-efficient than our internal ref.

    I'm still not clear on why VDDA is moving with the board voltages, typically the MCU voltages are derived from an independent LDO or Buck regulator off a 5V or 12V main. In both those cases the regulators would try and keep the VDDA stable as well as the main board voltage moved.

    In summary:
    -Internal reference for ADC on F28027F is derived such that the FSR is 0 -3.3V across the operating conditions of the device. The deviation from ideal is listed in the datasheet as gain error.
    -The movement of that internal reference is largely temperature driven, that is I would consider any internal ref movement caused by VDDA to be secondary effect.
    -The warning with the above that Sean mentioned, is that any voltage converted on ADCINx that is above VDDA will suffer additional linearity error beyond what is listed in the datasheet.
    -For better gain error over the operating conditions an external reference can be provided on VREFHI, as with the REF20xx. The restriction on ADCIN wrt VDDA still applies, however.


    Best,
    Matthew