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Tool/software: TI C/C++ Compiler
Hi all
I am designign a three phase inverter, so I am using the epwm4, epw5 and epwm6 to generate the three phase sinusoidal signal. I set a data table in flash memory, from this table I obtain the pulses for epwm´s. I did a subroutines of service to epw´s interrupts. Althought the configuration of three epw modules is almost equal, only epwm4 and epwm5 function fine. The epw6 not generat the interruption. I send screenviews about the set the modules epwm.
I hope that someone can to help me.
Thanks a lot in advance.
Sebastián
Hi Kaparrent
I did an exercise where I changed the epwm modules 3, 4 and 5 instead 4, 5 and 6 epwm modules. In this case the module epwm5 don´t generates the interruption. I want to say that the three interruption service subrutines have the instruction to clear the interruption flag. However, I will eliminate this instruction.
The PieVectTable is in the file PieVect_5_6_7_8_9_10.c this file is part of the example Lab7 in the C2000 Piccolo workshop. So I send several screewn views that show the table.
Tanks a lot.
Sebastián...
Hi Kparrent
With the instruction for clear ETCLR, INT bit I tried clear interrupt flag fo the epwm6, but don´t function. Now I am using empw3, epwm4 and epwm5, therefore this instruction don´t have efect in my actual program. However I will put this like a coment.
The screenviews correspond to PieVectTable file and I sent such in order, if you see the lines number, is the complet file and sent those because another partner of forum asked to me.
Thanks a lot.
Sebastián
Sebastián,
please read the following addresses using the memory browser during run time. If the value of the these addresses are not the same as the corresponding ISR address you need to correct them.
0x0000 0D60 EPWM1_INT (EPWM1)
0x0000 0D62 EPWM2_INT (EPWM2)
0x0000 0D64 EPWM3_INT (EPWM3)
0x0000 0D66 EPWM4_INT (EPWM4)
0x0000 0D68 EPWM5_INT (EPWM5)
0x0000 0D6A EPWM6_INT (EPWM6)
0x0000 0D6C EPWM7_INT (EPWM7)
If those are correct: read the configuration of the switches shown in the diagram below(INTM, IER, IFR, PIEIER, PIEIFR), if they are not enabled your interrupt signal will not reach the CPU.
Regards,
Cody