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TMS320F28379D: CPU2 .text to GSxRAM

Hakan B
Expert 1120 points

Part Number: TMS320F28379D

Hi guys,

I want my CPU2 application to run on GSxRAM of my F28379D. So , I modified the RAM.cmd file and placed .text into GSxRAM. However, when I try to load the program using JTAG, it doesn't work. It is because first I have to assign GSxRAM to CPU2 using GSxMSEL registers. And this process should be done by CPU1. If I move .text to LSxRAM of CPU2 instead of GSxRAM, everything works fine. However my .text size will be much more than all LSxRAM of CPU2 and I will need to use GSxRAM as well.

My question is, is there any other way that we can assign GSxRAMs to CPU2, so that there is no need to load a program to CPU1 for the assignment?

Regards,

Hakan

  • 0
    TI__Guru** 117331 points

    Hi Hakan,

    If you don't want to run the CPU1 application then you can modify CPU1 Gel file (right click on CPU1 target and open Gel file) and add the code inside OnReset() or OnConnect() function to allocate GSxRAM to CPU2. This will work as long as you connect to CPU1 in CCS. But in standalone mode you have to have CPU1 code to assign GSxRAM to CPU2 and only after running that you can run CPU1 code. 

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    Expert 1120 points

    Hi Vivek,

    Thanks for the reply. Can you suggest me a source (example code, etc) about how to assign GSxRAM to CPU2 using gel files? I have no idea about it?

    Regards,

    Hakan

  • 0 in reply to Hakan B
    TI__Guru** 117331 points
    Kadir,

    Sorry for late reply. Please refer below link on how to edit Gel file.

    processors.wiki.ti.com/.../GEL

    Let me know if you have any further queries.

    Regards,

    Vivek Singh
  • 0 in reply to Vivek Singh
    Expert 1120 points
    Vivek,

    Thank you for the reply. Actually during this time, I converged to another solution. I modified the CodeStartBranch.asm of CPU2, so that it waits a specific IPC flag to jump c_init. This flag is set by CPU1 after GSxRAM is assigned to CPU2. Although this is not the answer that I asked at the beginning of this thread, this solution also solved the issue of synchronizing of CPUs.

    Hakan