CCS/TMS320F28377D: Converting SDFM output into mVolts

Alexey,

Please provide following information

1) What is the filter type used?

2) What is the DOSR settings?

3) Are you using PWM sync option to synchronize the filters?

4) Is this a custom board (or) are you using control card + AMC EVM setup?

Assuming you are using filter type = Sinc3 &  DOSR = 256 (based on your earlier post), digital filter output of 4400 (decimal) when applying +250mv is clearly incorrect. Did you check your hardware setup? We first need to cross this hurdle before we worry about digital filter output interpretation.

Regards,

Manoj

Manoj,

1 and 2) The configuration is as follows:

Sdfm_configureInputCtrl(gPeripheralNumber, FILTER1, MODE_2);

HLT = 0x7FFF; //Over value threshold settings
LLT = 0x0000; //Under value threshold settings

Sdfm_configureComparator(gPeripheralNumber, FILTER1, SINC3, OSR_32, HLT, LLT);

Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);

3) PWM11 CMPC is used to synchronize the filter. Synchronization works, I checked it.

4) We are using control card and AMC. I'll update the thread with schematics and a picture later.

Thanks,

Alexey.

Pictures and schematics:

Alexey,

One more checkpoint would be to make sure SD-Cx and AMC1306 CLKIN are working at the same frequency. If both are not in the same frequency, you might miss samples which can result in wrong digital filter output. I believe PWM output is clocking both SD-Cx and AMC1306 CLKIN. But, you pictorial representation doesn't show that.

Regards,
Manoj

Manoj,

1) You are right, we have replaced the Sigma-Delta modulator on the evaluation board with a component _with_ Manchester encoding.

This is the picture of the datasheet of the Sigma-Delta modulator that we are using (AMC1306E25). The letter "E" defines it as capable of Manchester encoding:

The clock source (10 MHz) is ECAP without connection to SD-C.

We have replaced the Sigma-Delta modulator from the stock version of Evaluation Board with this component. However, the very same problem existed with the stock version of the component, which was used with MODE_0. (Actually, replace of the component with change from MODE_0 to MODE_2 produces exactly same results). When we worked with the stock component, we have provided the clock to SD-C input with physical connection (from GPIO05 configured as ECAP output to GPIO17 configured as SD-Clock input).

It is possible to revert back to stock version of the modulator, the SD output will still be in range of about 4500; this is from where we turned to Manchester.

2) We are powering the evaluation board with 3.3V from the control board. I did not show the power lines in the schematics above, it's my fault.

3) We are waiting 27.8 usecs between the SDFM reset and the reading, which is performed according to the "data ready" interrupt.

The yellow channel is configured to represent the SDFM reset.

PWM11 is configured as up-down PWM with EPWM_TIMER_TBPRD = 2500. Yellow probe is PWM11 channel A, configured to (*EPWM[gPWM_number]).CMPA.bit.CMPA = EPWM_TIMER_TBPRD - 1 (the -1 is to make the signal bolder on the scope). The CMPC used to reset the SDFM is configured as (*EPWM[gPWM_number]).CMPC = EPWM_TIMER_TBPRD; - therefore, since they use the same counter, "SDFM Reset" event occurs exactly in the middle of the tiny yellow peak.

The blue channel is a GPIO toggled at Sigma-Delta reading function, which is called from a "data ready" interrupt:

__interrupt void Sdfm1_ISR(void)
{
uint32_t sdfmReadFlagRegister = 0;

sigma_delta_read();

.....}

void sigma_delta_read(void) {

static unsigned int loopCounter1 = 0;
int32_t read_data;

GpioDataRegs.GPFTOGGLE.bit.GPIO161 = 1;          <=== This is the toggle of the blue channel.

The difference between them is 27.8 usecs, which should be enough.

4) The hardware power is as follows:

This is the digital part powered from the DSP evaluation board.

This is analog part powered from internal EVB power supply.

This is an analog input example taken from an external DC power source (batteries pack) for example. The corresponding raw data read from the SDFM is:

obtained with

void sigma_delta_read(void) {

	static unsigned int loopCounter1 = 0;
	int32_t read_data;


	GpioDataRegs.GPFTOGGLE.bit.GPIO161 = 1;
	read_data = SDFM1_READ_FILTER1_DATA_16BIT;

	Filter3_Result[loopCounter1] = read_data;

5) I think it would be convenient if you reproduce our setup (with the stock version of the EVM - including SD-C clock) and use the same software in order to check the correlation of the results.

Thanks,

Alexey.

Manoj,

Just for reference, with SDFM filter configured as 32 bits —

Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3,
                              OSR_256, DATA_32_BIT, SHIFT_0_BITS);

void sigma_delta_read(void) {

	static unsigned int loopCounter1 = 0;
	int32_t read_data;

	GpioDataRegs.GPFTOGGLE.bit.GPIO161 = 1;
	read_data = SDFM1_READ_FILTER1_DATA_32BIT;
	Filter3_Result[loopCounter1] = read_data;

— And input of 180 mV (verified with a multimeter as shown on one of the photos above) I receive the following data in the Filter3_Result[]:

Thanks,

Alexey.

Manoj,

Ok, I moved to SINC1 and reduced the OSR to 32.

Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC1,
                              OSR_32, DATA_16_BIT, SHIFT_0_BITS);

I should not receive any incorrect samples. However, I manually skip 3 first samples after reset, by introducing a global variable which is set to value 3 at the PWM interrupt (SDFM reset) and either reducing its value in SDFM interrupt handler or calling sigma_delta_read()

int skip_samples = 3;

__interrupt void Sdfm1_ISR(void)
{
    uint32_t sdfmReadFlagRegister = 0;

    if (skip_samples == 0)
    {
    	sigma_delta_read();
    }
    else
    {
    	skip_samples--;
    }
. . . .
}

__interrupt void PWM11_Comparator_C_UP_DOWN_ISR (void)
{
    skip_samples = 3;
. . . .
}

This is how the scope looks like now:

The input value is 180 mV:

However, the readings I get from the SDFM are very low and noisy (note values from 16.0 to 20.0):

Would you please advise on the next step in debugging?

Thanks,

Alexey.

Manoj,

We can't afford delay of 77 usecs. We have strict requirement of 50 usecs of time overall, including at least 2 measurements of voltage. After 50 us, the voltage is changed, and we have to reset the SD filter in order to discard old data read in the previous cycle. Therefore, we can only operate in range of up to 50 us. And in this period of time we have to measure voltage twice, which leaves even less time for the SD to settle. We were even considering the option of reducing the work cycle from 50 us to 25 us or less, — in this case, as I see it, Sigma-Delta will not be the ideal voltage measurement solution.

I understand that Sinc1 is noisy, but aren't the values I read too low even for noisy environment? Input of 180 mV, output of 16-20 with median at 18, — isn't the output too low for this input?

Thanks,

Alexey.

Manoj,

You are right, waiting for 81.6 usecs between the reset and the reading with input of +250 mV gave output of 25577-25581 from the SD filter.

Thanks,

Alexey.

Manoj,

We managed to increase the SD clock to ~18 MHz, that reduced times of waiting even more. Unfortunately, we can't increase the SD clock to 20 MHz in current setup, since we're using eCAP in PWM mode for the clock generation, and the next value it can generate after 18 MHz is about 22 MHz, which is out of limits supported by the hardware. We are considering using an external oscillator for that purpose, though.

Thank you for your support!

Alexey.

Alexey,

Glad to know you issue is resolved.

I'm closing this thread. If you have new questions open a new thread.

Regards,

Manoj