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TMS320F28069: IIC incomplete communication on F28069, sometimes lose clock

Sheldon He
Expert 8585 points
Part Number: TMS320F28069

Hi expert,

Some engineer I support met with a IIC problem on F28069 system recently. I need your advice to find the root cause of the problem.

Here are some fact I get:

1. A complete IIC communication contains 18 clock in their application.

2. F28069 is the master in the communication.

3. When the machine operates at full load (7kw) the IIC communication will fail with lose of clocks. (Not all working conditions has this problem)

4. Lose of clock happens both when the master read or write data from/to slave.

Here are some waveform samples I get from this engineer: (Here you can see 7, 12 and 9 clocks respectively)

Thank you very much my expert!

  • 0
    TI__Mastermind 42936 points

    Hi Sheldon,

    Under normal operating conditions this issue does not occur? I.E. only happens when the system is at full load? Do all other functionalities outside of I2C work when under these same operating conditions? When these clocks are lost does it corrupt the I2C communications completely or does it begin to work later?

    Could you share more information about the engineer's system?

    For the regular 18 clock communication, I'd imagine it consists of a START condition then 7 bits of slave address + 1 read/write bit + 1 ACK bit then 8 bits of data +1 ACK or NACK bit then a STOP condition.

    The screenshots don't provide a ton of information, though it does show in the first two that the SCL/SDA lines are dropped and left high (I2C is active low comms) while the 3rd screenshot the lines are held low (usually by the slave device).

    Best,

    Kevin

  • 0 in reply to Kevin Allen18
    TI__Expert 8585 points

    Hi Kevin,

    Thanks for your reply!

    Under normal operating conditions this issue does not occur? I.E. only happens when the system is at full load?

    It also happens in other working conditions. The happening rate varies from device to device. Generally, the higher power, the higher rate it happens.

    Do all other functionalities outside of I2C work when under these same operating conditions?

    Other peripherals works well at the same time.

    When these clocks are lost does it corrupt the I2C communications completely or does it begin to work later?

    They have a scheme that the IIC will reset if no data is received in a long time. When the problem occurs, even the reset will not recover the system to normal communication.

    Could you share more information about the engineer's system?

    Yes, I will send you these information using email.

    Thanks.

  • 0 in reply to Sheldon He
    TI__Mastermind 42936 points
    Issue has been taken offline and is continuing in the following thread:

    e2e.ti.com/.../718378

    Thank you,
    Kevin