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CCS/TMS320F28069: TMS320F28069-EPWM

Part Number: TMS320F28069

Tool/software: Code Composer Studio

Dear Team,

I would like to generate below pulse using EPWM.

For every 31ms this pattern should be repeated.

As per my understanding Total period is 31ms and two low pulses should be generated with fixed width 540us and 910us.

As per my understanding if we take up-down counter and CMPA load with required value and counter compares with counter always, and  if matches it checks AQCTLA for making high and low of EPWMA.. 

Kindly let me know is it possible to generate this kind of pulse using EPWM? If so please provide concept or piece of code.

Thank you.

Regards,

Upender Reddy M

  • Hi Upender,

    I think there are too many edges / not enough symmetry to configure the ePWM as set-and-forget for this waveform, but it should be easy enough to produce this since it is pretty low speed.

    I think you want to alternate between 1 ePWM cycle with period = 2.25ms and then 1 ePWM cycle with period of 28.75ms.

    Set the ePWM to shadow load the period and compare A on zero match and then also trigger an ISR also on zero match. In the ISR load in the ePWM parameters (new period and compare) for the next cylce into the shadow registers.
  • Your post has been assigned to an expert. They'll be getting back to you soon. Thanks for your patience.

    Edit: Oops, Devin beat me to it.


    Whitney

  • Hi,

    Thanks for the clarification.

    Currently I am trying  to generate pwm as mentioned above. Below is the my configuration and toggling of new period and Compare values for different pulse.

    EPwm1Regs.TBPRD = 1406; period for 2ms

    EPwm1Regs.CMPA.half.CMPA = 395; duty of 540 us

    EPwm1Regs.TBCTR = 0; // clear TB counter

    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetric

    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Phase loading disabled

    EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;

    EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;

    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT

    EPwm1Regs.TBCTL.bit.CLKDIV = 6;//TB_DIV1;

    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;//CC_SHADOW;

    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR = Zero

    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR = Zero

    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;

    EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;

    // Interrupt where we will change the Compare Values

    EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;//ET_CTR_ZERO; // Select INT on Zero event

    EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT

    EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;//ET_3RD; // Generate INT on 3rd event

    whenever interrupt comes below ISR iam toggling period and CompA values. Initial value of toggle is 0.

    __interrupt void epwm1_isr(void)

    {

    // Update the CMPA and CMPB values

    //update_compare(&epwm1_info);

    toggle++;

    if(toggle == 1)

    {

    EPwm1Regs.TBPRD = 1406;

    EPwm1Regs.CMPA.half.CMPA = 395;

    }

    else if(toggle == 2)

    {

    EPwm1Regs.TBPRD = 20374;

    EPwm1Regs.CMPA.half.CMPA = 510;

    toggle=0;

    }

    else

    {

    }

    // Clear INT flag for this timer

    EPwm1Regs.ETCLR.bit.INT = 1;

    // Acknowledge this interrupt to receive more interrupts from group 3

    PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;

    }

    But iam able to see on scope period is changing ( 2ms and 29 ms) but width is not changing which is holding initial value(EPwm1Regs.CMPA.half.CMPA = 395;)

    As per my understanding In shadow mode when TBCTR reaches zero,shadow register value will load into active register.

    Kindly let me know how can I solve this? Please refer attach pulse file(hope previously also attached)

    Thank you.

    Regards,

    Upender Reddy M

     

  • Upender,
    I am trying to understand what problems you are currently facing.
    So your Period adjustment is OK now?

    The only problem is that you are unable to update CMPA?

    You are using UP-DOWN count mode, can you draw the counter value next to your output waveform?

    Regards,
    Cody
  • Have you managed to resolve this issue?

    Whitney