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GS RAM TMS320F28379D and TMS320F28075

I understand it correctly, if you re-divide the memory of GlobalShared into the memory of the program and Data (Page 0 and 1), then nothing terrible will happen?

Suppose I take a section of GS5-6 I give for the program-Page 0, and GS0-4 for the data (Page 1 -DATA), and as soon as I get access to the memory of GS0-4 from DMA (Page 1 -DATA) it does not affect the delay execution by the processor program in the memory area GS5-6.

It turns out these 2 sites do not affect each other? and completely fundamentally separated?