TMS320F28377D: ECAP Synchronisation

Hi Manohar,

If you want to synchronize ECAP1-ECAP4 through SW signal, then you will have to make minor changes to the code, mentioned below:

SyncSocRegs.SYNCSELECT.bit.ECAP4SYNCIN = 4U; //0x100 ECAP1SYNCOUT will be the SYNCIN for ECAP4

ECap4Regs.ECCTL2.bit.SWSYNC = 1; -- Not needed, remove it from the code, you are taking eCAP1 SYNCOUT as a SYNCIN for eCAP4.

By default it will continuously capture, in capture mode, ECCTL2.CONT_ONESHT = 0x0.

Regards,
Nirav

Hi Nirav,

Questions:

1. Then as mentioned in the below block, ECAP1-ECAP2-ECAP3 are by default synchronized?

2. I mean synchronization here as starting the Timer counter at the same time? The above block shows the ECAP1 syncout is fed to ECAP2 syncin which does not makes their timer counter to start in a line. how to do that?

3. Only ECAP1 and ECAP4 can be used to have the synchronized base counter? if yes, how to use EXTSYNCIN1 to trigger ECAP1-ECAP4?

4. For configuring the above, in data sheet below lines are mentioned,

• Select an unused GPIO in InputXbarRegs.INPUT5SELECT.
• Configure this GPIO in output mode and Write ‘0’ to GPIO DAT register. By default this is programmed
to GPIO0 so any activity on this pin will cause problems with the SWSYNC
• Program SYNCSEL[ECAPxSYNCIN] = 0x101. This will take ECAPx.EXTSYNCIN to an inactive state.

What is the purpose of the GPIO output pin? i need to connect this pin for synchronization?

Please suggest a way to achieve this.

Regards,
Manohar

Hi Manohar,

Please find my comments in line:

1.  Then as mentioned in the below block, ECAP1-ECAP2-ECAP3 are by default synchronized?

-- ECAP2 and ECAP3 are synchronized by ECAP1SYNCOUT, so answer is yes.

2. I mean synchronization here as starting the Timer counter at the same time?

-- Yes

The above block shows the ECAP1 syncout is fed to ECAP2 syncin which does not makes their timer counter to start in a line. how to do that?

-- Do you mean ECAP1 counter does not start at the same time as ECAP2? How did you determine that?

3.  Only ECAP1 and ECAP4 can be used to have the synchronized base counter? if yes, how to use EXTSYNCIN1 to trigger ECAP1-ECAP4?

-- Thats not true, you can synchronize ECAP1-ECAP4 with SW sync, you can also use EXTSYNCIN1 to synchronize if that is the intent, how do you want to achieve synchronization? If you want to  use EXTSYNCIN1 all you do is:

ECap1Regs.ECCTL2.bit.SWSYNC = 0;

GpioDataRegs.GPDDAT.bit.GPIO66 = 0; -- Remove this, and provide trigger on this pin externally

4.What is the purpose of the GPIO output pin? i need to connect this pin for synchronization?

-- Default SYNCIN is EPWM1SYNCOUT and it will take precedence over SW sync. But if you want to use SWSYNC, and dont want any unwanted events on EPWM1SYNCOUT resetting the counter, TI recommends you change the SYNCIN source to EXTSYNCIN1, and connect that to the unused GPIO, and drive that GPIO low so that no spurious event will reset the counters, and the synchronization is achieved through SW trigger only.

-- No you do not need to connect this pin, but also this pin cannot be used as GPIO for other operation when it is being used for eCAP Synchronization

Regards,

Nirav

Hi Nirav,

Thank you for your valueable reply.

-- Do you mean ECAP1 counter does not start at the same time as ECAP2? How did you determine that?

- I configured ECAP1 ECAP2 and giving input pulse with a phase delay of 10%.

The difference between the cap1 register data between ECAP1-2 not giving the 10% of phase delay or clock difference.

Question:

1.if i subtract cap1 register values of ECAP1 and ECAP2, i will be getting the phase difference?

2. When the synout signal generated from ECAP1 to start the ECAP2 base counter? till that i need to freeze the ECAP2 module after configuration?

I am experimenting to get the phase delay between the two input pulses.

Please suggest me how to achieve this.

Hi Nirav,

Sorry for late reply.

1. You have two clock signals that have phase difference of 10% that you feed into ECAP1 and ECAP2, correct?
Ans:
No, I have two clock signals having phase difference of 60 degree(360/6) not 10%.

2.What is the configuration of polarity for CAP1 register, rising/falling?
CAP1 - rising edge
CAP2- falling edge
with stop mode and ISR triggered at the cap2 to rearm. Reset of TBCTR happens on both event1 and event 2.

3. What are the capture values on capture events?
External pulse giving 1khz frequency to ECAP as input.
ECAP1_CAP1 - 32336
ECAP1_CAP2 - 50017
ECAP2_CAP1 -16737
ECAP2_CAP2 - 15878


Regards,
Manohar

Hi Nirav,

I am able to get the phase shift between the ECAP1 input pulse and ECAP2 input pulse. And reverse calculate to get the 60 degree phase shift between the input pulse.

Question:
1. Now both the ECAP Base counter are operating inline. Resetting ECAP1 for a edge event will reset the ECAP2 counter? and make them to start the counter inline again?

2. because I am planning to reset the counter after overflow, will it affect the inline operation between the ECAP's Base counter?


Regards,
Manohar