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Original question:

Beginner problems with the F28377S Launchpad - Where to change the clock frequency?

CCS/LAUNCHXL-F28377S: LAUNCHXL-F28377S: PLLSYSCLK and SYSCLK pre-scalar by 4!

Subrahmanyam V
Intellectual 480 points

Part Number: LAUNCHXL-F28377S
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Dear Sir/Ma'am, 

I have written c code to check the SYSCLK frequency.

It has the following code:

// This should generate 200KHz SYSCLK from 10MHz oscillator using the PLL multipliers. --> 10*(1/50)MHz --> 5 microseconds.
ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL = 0x0;
ClkCfgRegs.SYSPLLMULT.bit.IMULT = 1;
ClkCfgRegs.SYSPLLMULT.bit.FMULT = 0;
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV =50;
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1;

Further, I have configured Timer-1 and toggled a GPIO to measure this frequency. My timer period is 10000. So, I need to get 5us*10000 = 0.05seconds on the CRO.

But, I get a waveform whose frequency is scaled by a factor 4 (measured time: 2s). I tried checking all the related pre-scalars but couldn't find where the extra factor 4 is coming from.

Can someone please help me with this?

Also, what is the relation between the PLLSYSCLK and SYSCLK (CPU). I suspect that factor is in here. But, I can't find from the manuals.

Thank you,

Subrahmanyam,

  • 0
    Intellectual 480 points
    I could see that as the GPIO is toggled high and low for two interrupts, there is a factor of two! (Out of /4 factor.)
    Is the other /2 factor due to PLLSYSCLK /2 = SYSCLK?
  • 0 in reply to Subrahmanyam V
    TI__Guru** 117071 points

    Subrahmanyam,

    Ratio between SYSCLK and PLLSYSCLK depends on PLLSYSCLKDIV configuration. Based on clock configuration, you need to calculate the SYSCLK frq. You are using value for IMULT '1' which is not correct. It's out of PLL spec (supported output frq). In this case you don't need to lock the PLL (use bypass mode, don't  set PLLCLKEN to '1') and try running the test.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Intellectual 480 points

    Vivek,

    Here is the new code I used.

       EALLOW;

           // This should generate 200MHz SYSCLK from 10MHz oscillator using the PLL multipliers.

           // This would give a waveform of frequency 200 MHz because 10MHz * (20/1) as SYSPLLCLK, which is the Timer-1 clock too, after a prescalar!

           ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL = 0x0;

           ClkCfgRegs.SYSPLLMULT.bit.IMULT = IMULT_20;

           ClkCfgRegs.SYSPLLMULT.bit.FMULT = 0;

           ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV =PLLCLK_BY_2;

           ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1;

       EDIS;

    Question-1:

    as per the above diagram, I could not properly understand the relation between SYSCLK and PLLSYSCLK as PLLSYSCLKDIV comes after OSCCLK.

    Else, If my PLLSYSCLK = 200MHz and PLLSYSCLKDIV = 2, does it mean that SYSCLK = PLLSYSCLK /PLLSYSCLKDIV ? Because, from the figure, it doesn't reflect that!

    Question-2:

    I couldn't understand how to manually lock a PLL after configuring. Can you please tell me how to do this?

  • 0 in reply to Subrahmanyam V
    TI__Guru** 117071 points

    Hi,

     

    Question-1:

    as per the above diagram, I could not properly understand the relation between SYSCLK and PLLSYSCLK as PLLSYSCLKDIV comes after OSCCLK.

    Else, If my PLLSYSCLK = 200MHz and PLLSYSCLKDIV = 2, does it mean that SYSCLK = PLLSYSCLK /PLLSYSCLKDIV ? Because, from the figure, it doesn't reflect that!

    Yes, SYSCLK = PLLSYSCLK /PLLSYSCLKDIV.

     

    Question-2:

    I couldn't understand how to manually lock a PLL after configuring. Can you please tell me how to do this?

    What do you mean by locking the PLL manually? I would recommend to use the PLL configuration function in C2000Ware (see below code in F2837xD_SysCtrl.c") 

    #ifdef _LAUNCHXL_F28379D
    InitSysPll(XTAL_OSC,IMULT_40,FMULT_0,PLLCLK_BY_2);
    #else
    InitSysPll(XTAL_OSC, IMULT_20, FMULT_0, PLLCLK_BY_2);
    #endif // _LAUNCHXL_F28379D

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Intellectual 480 points
    Thanks Vivek for your quick help!